82V1671JG8 IDT, Integrated Device Technology Inc, 82V1671JG8 Datasheet - Page 45
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82V1671JG8
Manufacturer Part Number
82V1671JG8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V1671JG8.pdf
(107 pages)
Specifications of 82V1671JG8
Number Of Channels
4
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
PLCC
Operating Temperature Classification
Industrial
Pin Count
28
Mounting
Surface Mount
Operating Current
95mA
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Compliant
3.9.5
3.9.5.1
(impedance matching filters and transhybrid balance filter) should be
disabled. To simplify the formulas, the programmable receive and
transmit gain (GTX, FRX, GRR and FRR) are disabled by corresponding
registers (refer to
Based on this a factor K
defined:
3.9.5.2
3.9.6
3.9.6.1
RSLIC. The current offset can be measured by the DC level meter. The
following settings are necessary to accomplish this measurement:
RSLIC & CODEC CHIPSET
In order to measure current via the VTAC pin, all feedback loops
The transversal current I
LM
N
K
K
The operational state flow for the AC level meter is as the following:
1. The level meter is in the disable state (LM_EN = 0), the result
2. Set the level meter count number (LM_CN[10:0]) in registers
3. Enable the level meter (LM_EN =1) and it starts to accumulate
4. If the LM_ONCE bit is 0 (continuous mode), the level meter
5. If the LM_ONCE bit is 1 (single mode), the level meter runs one
The current offset error is caused by the current sensor inside the
• The RSLIC is set to Normal Active mode (for MPI interface,
INT:
ITAC:
Samples:
Result:
registers (GREG17 & GREG18) are cleared.
GREG15 and GREG16.
the samples. When the preset count number is reached, the
LM_OK bit is set and the accumulation result will be latched into
the result registers simultaneously. If the result exceeds the
preset threshold, the OTHRE bit in LREG10 will be set.
continues to measure the next samples right after one
measurement is finished, the LM_OK bit is reset after 125 µs.
time after the it is initiated and the LM_OK bit will not be reset until
the LM_EN bit is set to 0.
LREG6: SCAN_EN = 1, SM[2:0] = 000; for GCI interface,
downstream C/I channel: SCAN_EN = 1, SM[2:0] = 000) and the
loop is on-hook. In this condition, there should be no current
present, but the current sensor incorrectly indicates a current
flowing (current offset error).
I
RMS
=
MEASUREMENT VIA AC LEVEL METER
Current Measurement via VTAC
AC Level Meter Operational State Flow
MEASUREMENT VIA DC LEVEL METER
Offset Current Measurement
LM
N
Value of the shift factor
Value of the AC current to voltage converter for
transversal voltage (R
K
------------------------------------------------------------------------------------------------
K
Samples
ITAC
K
ADAC
Result
“3.3.2 Programmable Filters” on page 21
ADAC
=
×
= LM
= LM_CN
ADAC
8
=
K
INT
×
RMS
Value
1
(gain of analog to digital in AC loop) can be
R
×
Sense
LM
measured at the RSLIC:
N
/ 32768
Samples
Result
Sense
×
×
is the sense resistance)
π
K
ITAC
×
2
×
2
for details).
45
3.9.6.2
current Ring/GND can be measured by the DC level meter when the
RSLIC is in on-hook mode. The following settings are necessary to
accomplish the leakage current measurement:
I
I
I
Leakage TipIEND
Leakage RingIEND
Leakage TipIRing
• Select VTDC and VL to the DC level meter separately (by setting
• The value in the Offset Register must be set to 0 (by clearing the
• Then the transversal and longitudinal offset currents (I
K
K
K
K
The leakage current Tip/Ring, leakage current Tip/GND and leakage
• The RSLIC must be set to Normal Active mode when measuring
• The RSLIC must be set to Tip Open mode when measuring the
• The RSLIC must be set to Ring Open mode when measuring the
• Select VTDC to the DC level meter (LREG9: LM_SEL[3:0]= 0000);
• I
ITDC:
IL:
INT:
ADDC:
the leakage current Tip/Ring.
leakage current Ring/GND.
leakage current Tip/GND.
Leakage
bits LM_SEL[3:0] in LREG9 to ‘0000’ and ‘1001’ respectively).
word/DC Offset in the Coefficient RAM).
and I
–
–
–
Ldc,Off-Err
V
V
I
I
Tdc Off
Ldc Off
Leakage Current Measurement
can be calculated as shown below:
Tdc Off
Ldc Off
Value of the DC current to voltage converter for
transversal current (R
Value of the current to voltage for longitudinal current
Value of the shift factor
Gain of analog to digital conversion in the DC loop
K
K
K
=
=
,
,
IL
ADDC
ITDC
,
,
=
---------------------------------------------------------------------------- -
K
---------------------------------------------------------------------------- - I
K
=
) can be calculated.
–
–
---------------------------------------------------------------------------- -
K
ADDC
ADDC
–
–
ADDC
Err
Err
Err
=
R
Err
=
Sense
IDT82V1671/IDT82V1671A, IDT82V1074
×
=
=
2
-- -
5
×
1
-- -
2
=
×
=
K
K
×
LM
INT
K
LM
V
-------------------------------- -
V
------------------------- -
INT
LM
----------------------------------------------------------------- -
K
INT
----------------------------------------------------------------- -
K
R
Tdc Off
Ldc Off
Result
ADDC
ADDC
Result
×
Sense
×
K
Result
×
,
N
,
K
N
ITDC
N
Samples
IL
Samples
Samples
×
×
×
Sense
×
–
–
×
LM
LM
2
2
K
K
Err
Err
2
INT
INT
Result
Result
×
×
is the sense resistance)
×
K
K
×
×
K
ITDC
ITDC
N
N
ITDC
Samples
Samples
–
–
–
I
--------------------------------------------------------- -
Tdc Off
Tdc Off
I
----------------------------------------------------------
Tdc Off
,
,
,
–
–
–
Err
Err
Err
–
2
+
2
I
Ldc Off
I
Ldc Off
Tdc,Off-Err
,
,
–
Err
–
Err