IDT82V1671AJ IDT, Integrated Device Technology Inc, IDT82V1671AJ Datasheet - Page 21

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IDT82V1671AJ

Manufacturer Part Number
IDT82V1671AJ
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82V1671AJ

Number Of Channels
4
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
PLCC
Operating Temperature Classification
Industrial
Pin Count
28
Mounting
Surface Mount
Operating Current
95mA
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Compliant
by an anti-aliasing filter (AAF) and then is converted to a digital signal by
a 1-bit sigma-delta modulator (SDM). The digital signal is down-sampled
to an intermediate sample frequency to feed to the digital impedance
matching filter (IMF). Simultaneously, the down-sampled signal is
summed up with the output of the transhybrid balance filter (ECF). The
sum signal is transmitted through the transmit gain filter (GTX) and
further down-sampled to the baseband. A lowpass filter removes the
unwanted signals to meet ITU-T requirements and a frequency
response correction filter (FRX) follows to compensate for the
attenuation brought up by the impedance matching loop. The final stage
is a highpass filter (HPF) before the data is sent to the PCM encoder,
where data is A-law or µ-law compressed. At last, the data is assigned
to the selected time slot and transmitted to the PCM highway.
3.3.1.2
passed through the time slot assignment stage before being expanded
to a linear code at the baseband frequency of 8 kHz by the PCM
decoder. The expanded data is then up-sampled to a higher frequency
before passing through the frequency response correction filter (FRR)
that compensates for the attenuation brought up by the impedance
matching loop. The compensated signal is filtered by a lowpass filter and
further up-sampled to the intermediate frequency. The signal is then sent
to the receive gain filter (GRX). The output of the GRX goes in two ways:
one feeds to the transhybrid balance filter (ECF) and the other sums up
with the output of the digital impedance matching filter (IMF). This sum is
then up-sampled and processed by a digital sigma-delta demodulator
(D-SDM). An analog filter smooths the signal and outputs it to the RSLIC
via the ACP and ACN pins.
RSLIC & CODEC CHIPSET
In the transmit path, the analog voltage from the RSLIC is first filtered
In the receive path, the signal received from the PCM highway is first
Receive Path
-400
-200
-600
Im Z
0
L
300
Figure - 10 Nyquist Diagram
Possible impedance values
600
21
3.3.2
programmable filters is applied to the AC loop of the RSLIC-CODEC
chipset to optimize the performance of the line card. In addition to fully
complying with the ITU-T G.712 specifications, the chipset also provides
additional programmable analog/digital filters to match impedance,
balance transhybrid, correct frequency response and adjust gains. All of
the coefficients of the digital filters can be calculated automatically by a
software (Cal74) provided by IDT. When these coefficients are written to
coefficient RAM, the final AC transmission characteristics of the line card
will meet ITU-T specifications.
paths.
3.3.2.1
three feedback loops in each channel: one analog loopback, the AGIS
(Analog Gain for Impedance Scaling) stage, and two digital loopbacks in
the programmable filters stage GIS (Gain for Impedance Scaling) and
IMF (Impedance Matching Filter). See
loopback realizes the real part value (Re Z
digital loopbacks realize the imaginary part value (Im Z
impedance. The GIS and IMF filter loops operate at 2 MHz and 64 kHz
rate respectively.
the chipset can be set to any value inside the shadowed area in
10.
A comprehensive multi-rate signal process scheme with fixed/
Figure - 9
For the RSLIC-CODEC chipset, impedance matching is realized with
By programming the filters AGIS, GIS and IMF, the AC impedance of
900
PROGRAMMABLE FILTERS
Impedance Matching
shows the programmable filters in the transmit and receive
IDT82V1671/IDT82V1671A, IDT82V1074
1200
Figure - 9
Re Z
L
) of the impedance, while the
L
for details. The analog
L
) of the
Figure -

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