IDT82V1671AJ IDT, Integrated Device Technology Inc, IDT82V1671AJ Datasheet - Page 102

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IDT82V1671AJ

Manufacturer Part Number
IDT82V1671AJ
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82V1671AJ

Number Of Channels
4
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
PLCC
Operating Temperature Classification
Industrial
Pin Count
28
Mounting
Surface Mount
Operating Current
95mA
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Compliant
NOTES:
1) The BCLK frequency must be an integer multiple of the FSC frequency. The maximum BCLK frequency is 8.192 MHz. The minimum BCLK frequency is 64 kHz in compressed mode
2) TSX1 or TSX2 typically delays from the FSC for 8 ∗ N ∗ t22 ns in compressed mode and 16 ∗ N ∗ t22 ns in linear mode, where N is the specified time slot (value of TT[6:0] in register
3) t33 is defined to be the time when the TSX1 or TSX2 output achieves high level.
4)
RSLIC & CODEC CHIPSET
Figure - 46
and 128 kHz in linear mode if only one channel is used. The minimum BCLK frequency is 256 kHz in compressed mode and 512 kHz in linear mode if all four channels are used.
LREG1).
BCLK
FSC
DR1/DR2
DX1/DX2
TSX1/TSX2
and
Figure - 47
show the timing of transmit at the rising edges of BCLK and receive at the falling edges of it.
t25
t32
t29
t22
t26
t27
first bit
first bit
Figure - 47 PCM Interface Timing (Double Clock Mode)
t28
t30
102
t23
t31
t33
t24
High Z
IDT82V1671/IDT82V1671A, IDT82V1074

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