PEB3265F-V1.5 Infineon Technologies, PEB3265F-V1.5 Datasheet - Page 267
PEB3265F-V1.5
Manufacturer Part Number
PEB3265F-V1.5
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB3265F-V1.5.pdf
(383 pages)
Specifications of PEB3265F-V1.5
Lead Free Status / RoHS Status
Not Compliant
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Preliminary
6.3
This chapter comprises only the SLICOFI-2S/-2S2 PEB 3264/-2 and therefore the
DuSLIC-S and DuSLIC-S2 chip sets.
6.3.1
The SOP “Status Operation” command provides access to the configuration and status
registers of the SLICOFI-2S/-2S2. Common registers change the mode of the entire
SLICOFI-2S/-2S2 chip, all other registers are channel-specific. It is possible to access
single or multiple registers. Multiple register access is realized by an automatic offset
increment. Write access to read-only registers is ignored and does not abort the
command sequence. Offsets may change in newer versions of the SLICOFI-2S/-2S2.
(All empty register bits have to be filled with zeros.)
6.3.1.1
Data Sheet
00
01
02
03
04
05
06
H
H
H
H
H
H
H
REVISION
CHIPID 1
CHIPID 2
CHIPID 3
FUSE1
PCMC1
XCR
DBL-CLK
SLICOFI-2S/-2S2 Command Structure and Programming
SOP Command
SOP Register Overview
0
ASYNCH-R
X-SLOPE
Revision Number (read-only)
Chip Identification 1 (read-only)
Chip Identification 2 (read-only)
Chip Identification 3 (read-only)
Fuse Register 1
PCM Configuration Register 1
Extended Configuration Register
R-SLOPE
0
SLICOFI-2x Command Structure and Programming
NO-DRIVE-0
for internal use only
for internal use only
for internal use only
for internal use only
267
0
REV[7:0]
SHIFT
0
0
PCMO[2:0]
DuSLIC-S/-S2
0
2000-07-14
0
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