PEB3265F-V1.5 Infineon Technologies, PEB3265F-V1.5 Datasheet - Page 209

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PEB3265F-V1.5

Manufacturer Part Number
PEB3265F-V1.5
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB3265F-V1.5

Lead Free Status / RoHS Status
Not Compliant
Preliminary
Bit
OFFSET-H[7:0]
Bit
OFFSET-L[7:0]
Data Sheet
1F
20
H
H
OFR1
OFR2
7
7
6
Offset register high byte.
Offset register low byte.
The value of this register together with OFFSET-H is added to the
input of the DC loop to compensate a given offset of the current
sensors in the SLIC-E/-E2/-P.
6
Offset Register 1 (High Byte)
Offset Register 2 (Low Byte)
5
5
SLICOFI-2x Command Structure and Programming
4
OFFSET-H[7:0]
OFFSET-L[7:0]
4
209
3
3
2
2
00
00
DuSLIC-E/-E2/-P
1
H
H
1
2000-07-14
0
0
Y
Y

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