PEB3265F-V1.5 Infineon Technologies, PEB3265F-V1.5 Datasheet - Page 210

• Manufacturer Part Number: PEB3265F-V1.5
• Manufacturer: Infineon Technologies

Specifications of PEB3265F-V1.5

• Lead Free Status / RoHS Status: Not Compliant

Preliminary
Bit
This register is not applicable and not used in IOM-2 mode. Only enabled in PCM/µC
mode.
R1-HW
R1-TS[6:0]
Data Sheet
21
H
PCMR1
HW
R1-
7
Selection of the PCM highway for receiving PCM data or the higher byte
of the first data sample if a linear 16-kHz PCM mode is selected.
R1-HW = 0
R1-HW = 1
Selection of the PCM time slot used for data reception.
Note: The programmed PCM time slot must correspond to the available
slots defined by the PCLK frequency. No reception will occur if a
slot outside the actual numbers of slots is programmed. In linear
mode (bit LIN = 1 in register BCR3) R1-TS defines the first of two
consecutive slots used for reception.
6
PCM Receive Register 1
5
PCM highway A is selected.
PCM highway B is selected.
SLICOFI-2x Command Structure and Programming
4
210
R1-TS[6:0]
3
2
00
DuSLIC-E/-E2/-P
H
1
2000-07-14
0
Y