CYP15G0402DXB-BGI Cypress Semiconductor Corp, CYP15G0402DXB-BGI Datasheet - Page 27

• Manufacturer Part Number: CYP15G0402DXB-BGI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYP15G0402DXB-BGI

• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-02057 Rev. *G
Table 9. Package Coordinate Signal Allocation (continued)
Ball
M01
M02
M03
M04
M17
M18
M19
M20
N01
N02
N03
N04
N17
N18
N19
N20
R01
R02
R03
R04
R17
R18
R19
R20
L02
L03
L04
L17
L18
L19
L20
P01
P02
P03
P04
P17
P18
P19
P20
T01
T02
T03
T04
ID
Signal Name
COMDETC
RXCLKC+
RXCLKB–
TXCLKC
RXDC[2]
RXDC[1]
RXDC[0]
TXPERD
TXPERB
TXDC[6]
RXDB[8]
RXDC[6]
RXDC[7]
RXDC[9]
RXDC[8]
TXCLKB
RXDC[3]
TXDB[6]
TXDB[9]
TXDB[8]
TXDB[7]
TXDB[5]
TXDB[4]
TXDB[3]
TXDB[2]
TXDB[1]
TXDB[0]
RXOPC
TXOPD
TXOPB
LFIB
GND
GND
GND
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
LVTTL 3-S OUT
LVTTL I/O PD
LVTTL IN PD
LVTTL IN PD
LVTTL IN PU
LVTTL IN PU
Signal Type
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
POWER
POWER
POWER
POWER
Ball
U01
U02
U03
U04
U05
U06
U07
U08
U09
U10
U12
U13
U14
U15
U16
U17
U18
U19
U20
V01
V02
V03
V04
V05
V06
V07
V08
V09
V10
V12
V13
V14
V15
V16
V17
V18
V19
T17
T18
T19
T20
U11
V11
ID
Signal Name
COMDETD
COMDETA
REFCLK–
REFCLK+
RXDD[4]
RXDD[3]
RXDA[0]
RXDD[8]
RXDD[5]
RXDD[1]
RXDA[9]
RXDA[5]
RXDA[2]
TXDD[0]
TXDD[1]
TXDD[2]
TXDD[9]
TXDA[1]
TXDA[4]
TXDA[8]
RXDA[4]
TXDD[3]
TXDD[4]
TXDD[8]
TXDA[3]
TXDA[7]
RXOPD
RFENC
RXOPA
RFEND
RFENB
GND
GND
GND
GND
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
LVTTL 3-S OUT
LVTTL IN PD
LVTTL IN PD
LVTTL IN PD
Signal Type
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
GROUND
GROUND
GROUND
GROUND
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
POWER
POWER
POWER
POWER
POWER
PECL IN
PECL IN
POWER
POWER
POWER
W01
W02
W03
W04
W05
W06
W07
W08
W09
W10
W12
W13
W14
W15
W16
W17
W18
W19
W20
W11
Ball
V20
Y01
Y02
Y03
Y04
Y05
Y06
Y07
Y08
Y09
Y10
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y11
ID
Signal Name
RXCLKD–
TXCLKO–
RXCLKD+
TXCLKO+
RXCLKA+
RXCLKA–
TXPERA
RXDA[1]
TXDD[7]
RXDD[6]
RXDD[0]
RXDA[6]
RXDA[3]
TXCLKD
RXDD[9]
RXDD[7]
RXDD[2]
TXCLKA
RXDA[8]
RXDA[7]
TXDD[5]
TXDA[2]
TXDA[6]
TXDD[6]
TXDA[0]
TXDA[5]
TXDA[9]
TXRST
TXOPA
RFENA
CYP15G0402DXB
CYV15G0402DXB
LFID
GND
GND
VCC
GND
GND
VCC
VCC
LFIA
VCC
N/C
NO CONNECT
LVTTL I/O PD
LVTTL I/O PD
LVTTL IN PU
LVTTL IN PU
LVTTL IN PD
LVTTL IN PD
Signal Type
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
LVTTL OUT
GROUND
GROUND
GROUND
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GROUND
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
LVTTL IN
POWER
POWER
POWER
POWER
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