WG82577LM S LGWS Intel, WG82577LM S LGWS Datasheet - Page 162
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WG82577LM S LGWS
Manufacturer Part Number
WG82577LM S LGWS
Description
Manufacturer
Intel
Datasheet
1.WG82577LM_S_LGWS.pdf
(195 pages)
Specifications of WG82577LM S LGWS
Lead Free Status / RoHS Status
Supplier Unconfirmed
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10.2.1.3.26 Redirection Table - RETA (0x05C00 + 4*n (n=0…31); RW)
Note:
10.2.1.3.27 Random Key Register - RSSRK (0x05C80 + 4*n (n=0…9); RW)
155
The re-direction table is a 32 entry table. Each entry is composed of four tags each 8-
bits wide. Only the first or last six bits of each tag are used (five bits for the CPU index
and 1 bit for queue index).
RETA cannot be read when RSS is enabled.
The RSS Random Key register stores a 40-byte key (10 Dword entry table) used by the
RSS hash function.
0x05C00 + n*4
4:0
6:5
7
12:8
14:13
15
20:16
22:21
23
28:24
30:29
31
7:0
15:8
23:16
31:24
Bits
Bits
Offset
RW
RO
RW
RW
RO
RW
RW
RO
RW
RW
RO
RW
RW
RW
RW
RW
Type
Type
X
X
X
X
X
X
X
X
X
X
X
X
0x0
0x0
0x0
0x0
Tag 4*n+3
Reset
Reset
82577 GbE PHY—Intel
31:24
CPU INDX 0. CPU index for Tag 4*n (n=0,1,…31).
Reserved.
QUE INDX 0. Queue Index for Tag 4*n (n=0,1,…31).
CPU INDX 1. CPU index for Tag 4*n+1 (n=0,1,…31).
Reserved.
QUE INDX 1. Queue Index for Tag 4*n+1 (n=0,1,…31).
CPU INDX 2. CPU index for Tag 4*n+2 (n=0,1,…31).
Reserved.
QUE INDX 2. Queue Index for Tag 4*n+2 (n=0,1,…31).
CPU INDX 3. CPU index for Tag 4*n+3 (n=0,1,…31).
Reserved.
QUE INDX 3. Queue Index for Tag 4*n+3 (n=0,1,…31).
K0. Byte n*4 of the RSS random key (n=0,1,…9).
K1. Byte n*4+1 of the RSS random key (n=0,1,…9).
K2. Byte n*4+2 of the RSS random key (n=0,1,…9).
K3. Byte n*4+3 of the RSS random key (n=0,1,…9).
Tag 4*n+2
23:16
®
5 Series Express Chipset MAC Programming Interface
Tag 4*n+1
Description
Description
15:8
Tag 4*n
7:0
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