AM79C973BKC\W AMD (ADVANCED MICRO DEVICES), AM79C973BKC\W Datasheet - Page 197

• Manufacturer Part Number: AM79C973BKC\W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKC\W

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3/3.135V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 160
• Lead Free Status / RoHS Status: Not Compliant

ANR4: Auto-Negotiation Advertisement Register
(Register 4)
This register contains the advertised ability of the
Am79C973/Am79C975 device. The purpose of this
Bit(s)
12:11
4:0
15
14
13
10
9
8
7
6
5
Selector Field
Remote Fault
100BASE-TX
100BASE-TX
Full Duplex -
Half duplex -
Full Duplex -
Half duplex -
10BASE-T
10BASE-T
Next Page
Reserved
Reserved
Reserved
PAUSE
Name
Table 44. ANR4: Auto-Negotiation Advertisement Register (Register 4)
When set, the device wishes to engage in next page exchange. If
clear, the device does not wish to engage in next page exchange.
When set, a remote fault bit is inserted into the base link code
word during the Auto Negotiation process. When cleared, the
base link code work will have the bit position for remote fault as
cleared.
This bit should be set if the PAUSE capability is to be advertised.
This bit advertises Full Duplex capability. When set, Full Duplex
capability is advertised. When cleared, Full Duplex capability is
not advertised.
This bit advertises Half Duplex capability for the Auto-negotiation
process. Setting this bit advertises Half Duplex capability. Clearing
this bit does not advertise Half Duplex capability.
This bit advertises Full Duplex capability. When set, Full Duplex
capability is advertised. When cleared, Full Duplex capability is
not advertised.
This bit advertises Half Duplex capability for the Auto-negotiation
process. Setting this bit advertises Half Duplex capability. Clearing
this bit does not advertise Half Duplex capability.
The Am79C973/Am79C975 device is an 802.3 compliant device
P R E L I M I N A R Y
Am79C973/Am79C975
Description
register is to advertise the technology ability to the link
partner device. See Table 44.
When this register is modified, Res tar t Auto-
Negotiation (Register 0, bit 9) must be enabled to guar-
antee the change is implemented.
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
H/W or Soft
Reset
0x01
0
0
0
0
0
0
1
1
1
1
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