AM79C973BKC\W AMD (ADVANCED MICRO DEVICES), AM79C973BKC\W Datasheet - Page 103
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AM79C973BKC\W
Manufacturer Part Number
AM79C973BKC\W
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AM79C973BKCW.pdf
(304 pages)
Specifications of AM79C973BKC\W
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3/3.135V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
160
Lead Free Status / RoHS Status
Not Compliant
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OnNow Wake-Up Sequence
The system software enables the PME pin by setting
the PME_EN bit in the PMCSR register (PCI configura-
tion registers, offset 44h, bit 8) to 1. When a Wake-up
event is detected, the Am79C973/Am79C975 control-
ler sets the PME_STATUS bit in the PMCSR register
(PCI configuration registers, offset 44h, bit 15). Setting
this bit causes the PME signal to be asserted. Asser-
tion of the PME signal causes external hardware to
wake up the CPU. The system software then reads the
PMCSR register of every PCI device in the system to
determine which device asserted the PME signal.
When the software determines that the signal came
from the Am79C973/Am79C975 controller, it writes to
the device’s PMCSR to put the device into power state
Link Change
MPPEN
PG
MPMODE
MPEN
LCMODE
Pattern
Input
BCR47
Pattern Match RAM (PMR)
BCR46
H_RESET
Magic Packet
Pattern Match
Link Change
Figure 49. OnNow Functional Diagram
MPDETECT
BCR45
P R E L I M I N A R Y
Am79C973/Am79C975
R
S
POR
CLR
POR
SET
Q
Q
D0. The software then writes a 0 to the PME_STATUS
bit to clear the bit and turn off the PME signal, and it
calls the device’s software driver to tell it that the device
is now in state D0. The system software can clear the
PME_STATUS bit either before, after, or at the same
time that it puts the device back into the D0 state.
Link Change Detect
Link change detect is one of Wake-up events defined
by the OnNow specification and is supported by the
RWU mode. Link Change Detect mode is set when the
LCMODE bit (CSR116, bit 8) is set either by software
or loaded through the EEPROM.
When this bit is set, any change in the Link status will
cause the LCDET bit (CSR116, bit 9) to be set. When
R
R
R
S
S
S
POR
SET
CLR
SET
CLR
SET
CLR
Q
Q
Q
Q
Q
Q
MPMAT
LCDET
PMAT
PME_EN_OVR
LCEVENT
MPMAT
PME_EN
PME Status
POR
MPINT
LED
WUMI
S
R
RWU
DET
CLR
Q
Q
PME_STATUS
21510D-54
PME
103
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