AM79C973BKC\W AMD (ADVANCED MICRO DEVICES), AM79C973BKC\W Datasheet - Page 189
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AM79C973BKC\W
Manufacturer Part Number
AM79C973BKC\W
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AM79C973BKCW.pdf
(304 pages)
Specifications of AM79C973BKC\W
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3/3.135V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
160
Lead Free Status / RoHS Status
Not Compliant
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BCR39: PCI DATA Register Two (DATA2) Alias
Register
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PMCSR register.
Since these two are read only, BCR39 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
two. Bits 15-0 in this register are programmable
through the EEPROM.
Bit
15-10 RES
9-8
7-0
Name
D2_SCALE These bits correspond to the
DATA2
DATA1
Read
D1_SCALE is read only. Cleared
by H_RESET and is not affected
by S_RESET or setting the STOP
bit.
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
Read accessible always. DATA1
is
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
Description
Reserved locations. Written as
zeros and read as undefined.
DATA_SCALE
PMCSR (offset Register 44 of the
PCI configuration space, bits 14-
13). Refer to the description of
DATA_SCALE for the meaning of
this field.
Read
D2_SCALE is read only. Cleared
by H_RESET and is not affected
by S_RESET or setting the STOP
bit.
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
Read accessible always. DATA2
is
read
read
accessible
accessible
only.
only.
field
Cleared
Cleared
P R E L I M I N A R Y
Am79C973/Am79C975
of
always.
always.
the
by
by
BCR40: PCI DATA Register Three (DATA3) Alias
Register
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PCMCR register.
Since these two are read only, BCR40 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
three. Bits 15-0 in this register are programmable
through the EEPROM.
Bit
15-10 RES
9-8
7-0
BCR41: PCI DATA Register Four (DATA4) Alias
Register
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PCMCR register.
Since these two are read only, BCR41 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
four. Bits 15-0 in this register are programmable
through the EEPROM.
Bit
Name
D3_SCALE These bits correspond to the
DATA3
Name
Description
Description
H_RESET and is not affected by
S_RESET or setting the STOP bit
Reserved locations. Written as
zeros and read as undefined.
DATA_SCALE field of the PMC-
SR (offset Register 44 of the PCI
configuration space, bits 14-13).
Refer
DATA_SCALE for the meaning of
this field.
Read
D3_SCALE is read only. Cleared
by H_RESET and is not affected
by S_RESET or setting the STOP
bit.
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
Read accessible always. DATA3
is
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
read
to
accessible
only.
the
description
Cleared
always.
189
by
of
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