82V2081PPG8 IDT, Integrated Device Technology Inc, 82V2081PPG8 Datasheet - Page 12

82V2081PPG8

Manufacturer Part Number
82V2081PPG8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 82V2081PPG8

Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant
SINGLE CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
Table-1 Pin Description (Continued)
SCLKE
PULS3
PULS2
TERM
MONT
Name
SDO
ACK
RDY
AD7
AD6
RD
DS
Type
I/O
I/O
O
I
I
I
I
Pin No.
23
22
33
32
SDO: Serial Data Output
In serial microcontroller interface mode, this signal is the output data of the serial interface. Configuration or Status data at SDO
pin is clocked out of the device on the falling edge of SCLK if SCLKE pin is high, or on the rising edge of SCLK if SCLKE pin
is low.
ACK: Acknowledge Output
In Motorola parallel mode interface, the low level on this pin means:
RDY: Ready signal output
In Intel parallel mode interface, the low level on this pin means a read or write operation is in progress; a high acknowledges
a read or write operation has been completed.
TERM: Internal or external termination select in hardware mode
This pin selects internal or external impedance matching for both receiver and transmitter.
SCLKE: Serial Clock Edge Select
In serial microcontroller interface mode, this signal selects the active edge of SCLK for outputting SDO. The output data is valid
after some delay from the active clock edge. It can be sampled on the opposite edge of the clock. The active clock edge which
clocks the data out of the device is selected as shown below:
RD: Read Strobe
In Intel parallel multiplexed interface mode, the data is driven to AD[7:0] by the device during low level of RD in a read operation.
DS: Data Strobe
In Motorola parallel multiplexed interface mode, this signal is the data strobe of the parallel interface. In a write operation (R/
W = 0), the data on AD[7:0] is sampled into the device. In a read operation (R/W = 1), the data is driven to AD[7:0] by the device.
MONT: Receive Monitor gain select
In hardware control mode with ternary interface, this pin selects the receive monitor gain of receiver:
0= 0dB
1= 26dB
AD7: Address/Data Bus bit7
In Intel/Motorola multiplexed interface mode, this signal is the multiplexed bi-directional address/data bus of the microcontroller
interface.
In serial microcontroller interface mode, this pin should be connected to ground through a 10 kΩ resistor.
PULS[3:0]: these pins are used to select the following functions in hardware control mode:
Refer to
AD6: Address/Data Bus bit6
In Intel/Motorola multiplexed interface mode, this signal is the multiplexed bi-directional address/data bus of the microcontroller
interface.
In serial microcontroller interface mode, this pin should be connected to ground through a 10 kΩ resistor.
See above.
The valid information is on the data bus during a read operation.
The write data has been accepted during a write cycle.
0 = ternary interface with external impedance matching network
1 = ternary interface with internal impedance matching network
T1/J1/E1 mode
Transmit pulse template
Internal termination impedance (75Ω/120Ω/100Ω/110Ω)
5 HARDWARE CONTROL PIN SUMMARY
SCLKE
High
Low
Rising edge is the active edge.
Falling edge is the active edge.
12
SCLK
for details.
Description
TEMPERATURE RANGES
INDUSTRIAL

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