LAN9311-NZW Standard Microsystems (SMSC), LAN9311-NZW Datasheet - Page 48
![no-image](/images/manufacturer_photos/0/6/632/standard_microsystems__smsc__sml.jpg)
LAN9311-NZW
Manufacturer Part Number
LAN9311-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9311-NZW.pdf
(460 pages)
Specifications of LAN9311-NZW
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
No
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9311-NZW
Manufacturer:
Standard
Quantity:
2
Company:
Part Number:
LAN9311-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
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Revision 1.7 (06-29-10)
4.3.2
The Port 1 & 2 PHY energy-detect events are capable of asserting the PME output by additionally
setting the PME_EN and ED_EN2 (Port 2 PHY) or ED_EN1 (Port 1 PHY) bits of the
Management Control Register
Host MAC Power Management
The Host MAC provides wake-up frame and magic packet detection modes. When enabled in the
MAC Wake-up Control and Status Register (HMAC_WUCSR)
and the MPEN bit for magic packets), detection of wake-up frames or magic packets causes the WUFR
and MPR bits of the HMAC_WUCSR register to set, respectively. If either of the WUFR and MPR bits
are set, the WOL_STS bit of the
events can enable PME output assertion by additionally setting the PME_EN bit of the
Management Control Register
The IRQ interrupt output can be triggered by a wake-up frame or magic packet as described in
5.2.6, "Power Management Interrupts," on page
Refer to
Detection," on page 119
Section 9.5, "Wake-up Frame Detection," on page 117
for additional details on these features.
(PMT_CTRL).
(PMT_CTRL).
Power Management Control Register (PMT_CTRL)
DATASHEET
48
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
53.
(via the WUEN bit for wake-up frames,
and
Section 9.5.1, "Magic Packet
SMSC LAN9311/LAN9311i
will be set. These
Datasheet
Section
Power
Power
Host
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