UJA1066TW/5V0,518 NXP Semiconductors, UJA1066TW/5V0,518 Datasheet - Page 16

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UJA1066TW/5V0,518

Manufacturer Part Number
UJA1066TW/5V0,518
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1066TW/5V0,518

Number Of Transceivers
1
Power Down Mode
Sleep/Standby
Standard Supported
ISO 11898-2
Operating Supply Voltage (min)
5.5V
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
UJA1066_2
Product data sheet
The behavior of pin RSTN is illustrated in
setting of bit RLC (which defines the reset length). Once an external reset event has been
detected, the system controller enters Start-up mode. The watchdog now starts to monitor
pin RSTN as illustrated in
enter Fail-safe mode (see
Fig 6.
Fig 7.
V
RSTN
V1
Reset pin behavior
Reset timing diagram
power-up
V
V
RSTN
RSTN
All information provided in this document is subject to legal disclaimers.
t
RSTNL
Rev. 03 — 17 March 2010
forced LOW
externally
RSTN
Figure
Figure
voltage
under-
RSTN externally forced LOW
t
RSTNL
t
t
RSTNL
RSTNL
7. If the RSTN pin is not released in time, the SBC will
3).
watchdog
missing
access
t
Figure
RSTNL
High-speed CAN fail-safe system basis chip
6. The duration of t
voltage
under-
spike
t
WD(init)
t
WD(init)
001aad181
RSTNL
time
time
UJA1066
power-
© NXP B.V. 2010. All rights reserved.
down
V
V
rel(UV)(V1)
det(UV)(V1)
depends on the
coa054
time
time
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