IDT77105L25TF8 IDT, Integrated Device Technology Inc, IDT77105L25TF8 Datasheet - Page 13

• Manufacturer Part Number: IDT77105L25TF8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT77105L25TF8

• Data Rate: 25.6Mbps
• Number Of Channels: 1
• Type Of Atm Phy Interface: UTOPIA
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 64
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

control, which indicates that the transmission device can receive an
entire 53 byte cell for transmission. Therefore, a complete cell will auto-
matically be received and transmitted by the 77105, even after TxCLAV
assertion is inhibited:
IDT77105
1. Assert TxFull, via register 0x02, Bit 7. This stops the 77105 from
2. Enter desired loopback mode.
3.
Entering Loopback (Cell Mode)
Under UTOPIA specification, cell transfer is initiated via the TxCLAV
1. De-assert TxCLAV, using 0x02, Bit 7. As described above, under
2.
3. Re-assert TxCLAV using 0x02, Bit 7.
receiving more data, and prevents the complete assembly of a
cell for transmission.
cell will continue to be assembled in the transmit FIFO; on
completion, it will be transmitted, as selected via the loopback
mode. If this partial cell should be discarded, assertion of TxSOC
will clear this 'short' cell from the internal FIFO, and normal oper-
ation will resume.
normal UTOPIA operation it is assumed that the remainder of the
cell will continue to be shipped to the 77105.
loopback mode. If loopback is entered prior to complete cell
receipt, the cell will be looped back.
After waiting for complete cell to be transmitted, enable desired
De-assert TxFull using 0x02, Bit 7. The previously 'interrupted'
Upstream System
Upstream System
Upstream System
25 Mbps TC
25 Mbps TC
Figure 10 PHY Loopback
Figure 11 Line Loopback
25 Mbps TC
Figure 9 Normal Mode
13 of 24
entering these modes. Therefore, follow the above instructions, except
replace step #2 with 'disable loopback mode'.
2. Counters
2. Counters
2. Counters
2. Counters
(e.g. software drivers) in evaluating communications conditions. It is
anticipated that these counters will be polled from time-to-time (user
selectable) to evaluate performance.
IDT77105
Exiting Loopback (Byte and Cell Modes)
The same conditions and concerns exist for exiting loopback, as for
Several condition counters are provided to assist external systems
IDT77105
!
!
!
!
IDT77105
– 8 bit counter
– counts all undefined 5 bit symbols in received data stream
– 16 bit
– counts all transmitted cells
– 16 bit counter
– counts all received cells
– 5 bit counter
– counts all received HEC errors
Symbol Error Counter
TxCell Counter
RxCell Counter
Receive HEC Error Counter
PMD
PMD
PMD
3445 drw 13
3445 drw 14
Interface
3445 drw 12
September 11, 2000
Interface
Interface
Line
Line
Line