85314BGI-01T IDT, Integrated Device Technology Inc, 85314BGI-01T Datasheet
85314BGI-01T
Specifications of 85314BGI-01T
Related parts for 85314BGI-01T
85314BGI-01T Summary of contents
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... D nCLK_EN Q LE CLK0 0 0 nCLK0 1 1 CLK1 CLK_SEL 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL TO F EATURES 5 differential 2.5V/3.3V LVPECL outputs Selectable differential CLK0, nCLK0 or LVCMOS inputs CLK0, nCLK0 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL CLK1 can accept the following input levels: ...
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... ABLE IN ESCRIPTIONS ABLE IN HARACTERISTICS 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL www.idt.com 2 ICS85314I- KEW ANOUT REV. F JULY 25, 2010 , UFFER ...
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... T 3A ABLE ONTROL NPUT UNCTION nCLK0 CLK0, CLK1 nCLK_EN nQ0:nQ4 Q0: ABLE LOCK NPUT UNCTION ABLE 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL TO ABLE Disabled F 1. nCLK_EN T D IGURE IMING IAGRAM www.idt.com 3 ICS85314I- KEW B ANOUT Enabled REV. F JULY 25, 2010 -5 TO UFFER ...
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... D - -2.5V/3.3V LVPECL F IFFERENTIAL TO 4.6V NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the -0. 0.5V CC device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions be- 50mA yond those listed in the DC Characteristics or AC Character- 100mA istics is not implied ...
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... T 4D. LVPECL DC C ABLE HARACTERISTICS 2.375V ABLE HARACTERISTICS Ø 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL 2.375V 3.8V 0V 3.8V 0V -40°C 85° ƒ ƒ www.idt.com 5 ICS85314I- KEW B ANOUT = -40°C 85° REV. F JULY 25, 2010 -5 TO UFFER ...
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... T YPICAL 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 1k 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL 155.52MH HASE OISE AT 12kHz to 20MHz = 0.05ps (typical) Raw Phase Noise Data 10k 100k FFSET REQUENCY Z www.idt.com 6 ICS85314I- KEW B ANOUT Z 155.52MHz RMS Phase Jitter (Random) ...
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... UTPUT OAD EST IRCUIT nQx Qx nQy Qy t sk( UTPUT KEW Phase Noise Plot Offset Frequency f 1 RMS Jitter = Area Under the Masked Phase Noise Plot RMS P J HASE ITTER 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL EASUREMENT NFORMATION V CC SCOPE Qx nCLK0 V PP nQx CLK0 IFFERENTIAL ...
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... CLK0 nQ0:nQ4 Q0: ROPAGATION ELAY IFFERENTIAL NPUT 80% Clock 20% Outputs UTPUT ISE ALL IME 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL TO CLK1 nQ0:nQ4 Q0: ROPAGATION 80 20 www.idt.com 8 ICS85314I- KEW B ANOUT (LVCMOS I ) ELAY NPUT REV. F JULY 25, 2010 -5 TO UFFER ...
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... CLK and nCLK can be left floating. Though not required, but for additional protection resistor can be tied from CLK to ground. LVCMOS ONTROL INS All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection resistor can be used. 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL PPLICATION NFORMATION ...
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... R5,R6 locate near the driver pin. F 3E. CLK/ CLK I D IGURE N NPUT RIVEN BY 3.3V LVPECL D RIVER WITH 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL TO are examples only. Please consult with the vendor of the driver and V must meet the component to confirm the driver termination requirements. For OH example in Figure 3A, the input termination applies for LVHSTL drivers ...
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... – 2)) – 4A. LVPECL O IGURE UTPUT 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL TO UTPUTS 50 transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 4A and 4B show two different layouts which are recommended only as guidelines. Other suitable clock lay- outs may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations ...
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... F 5A. 2.5V LVPECL D T IGURE RIVER VCC=2. Ohm Ohm 2,5V LVPECL Driv 5C. 2.5V LVPECL T IGURE ERMINATION 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL TO UTPUT close to ground level. The R3 in Figure 5B can be eliminated and the termination is shown in Figure 5C very CC VCC=2.5V 2.5V R3 250 + 2,5V LVPECL ...
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... T 6B ABLE HERMAL ESISTANCE JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL OWER ONSIDERATIONS = 3.8V, which gives worst case results. ...
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... Pd_L is the power dissipation when the output drives low. Pd_H = [(V – 2V))/ OH_MAX CC_MAX L [(2V - 1V)/ 20.0mW Pd_L = [(V – 2V))/ OL_MAX CC_MAX L [(2V - 1.7V)/ 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL LVPECL D C RIVER IRCUIT AND – 1.0V CC_MAX – 1.7V CC_MAX ...
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... Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs RANSISTOR OUNT The transistor count for ICS85314I-01 is: 674 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL ELIABILITY ...
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... ACKAGE UTLINE UFFIX FOR T ABLE Reference Document: JEDEC Publication 95, MO-153 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL TO TSSOP EAD 8A ACKAGE IMENSIONS ° www.idt.com 16 ICS85314I- KEW B ANOUT UFFER ° REV. F JULY 25, 2010 -5 TO ...
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... ACKAGE UTLINE UFFIX FOR T ABLE Reference Document: JEDEC Publication 95, MS-013, MO-119 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL TO SOIC EAD 8B ACKAGE IMENSIONS ° 0 www.idt.com 17 ICS85314I- KEW ANOUT ° 8 REV. F JULY 25, 2010 - UFFER ...
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... Any other applications such as those requiring high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. 85314BGI- ...
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... 85314BGI- -2.5V/3.3V LVPECL F IFFERENTIAL " " " www.idt.com 19 ICS85314I- KEW B ANOUT " REV. F JULY 25, 2010 -5 TO UFFER ...
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... Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA 85314BGI- -2.5V/3.3V LVPECL F ...