MPC941FAR2 IDT, Integrated Device Technology Inc, MPC941FAR2 Datasheet - Page 4

• Manufacturer Part Number: MPC941FAR2
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of MPC941FAR2

• Number Of Clock Inputs: 2
• Output Frequency: 250MHz
• Output Logic Level: LVCMOS
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: LQFP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: LVCMOS/LVPECL
• Mounting: Surface Mount
• Pin Count: 48
• Quiescent Current: 5mA
• Lead Free Status / RoHS Status: Not Compliant

IDT™ / ICS™ CLOCK DISTRIBUTION CHIP
MPC941
LOW VOLTAGE, 1:27 CLOCK DISTRIBUTION CHIP
Table 4. AC Characteristics (V
Table 5. DC Characteristics (V
1. AC characteristics apply for parallel output termination of 50 Ω to V
2. AC characteristics are guaranteed up to fmax. Please refer to applications section for information on power consumption versus operating
3. Fast input signal transition times are required to maintain part-to-part skew specification. If part-to-part skew is not critical to the application,
1. Input pull-up / pull-down resistors influence input current.
2. The MPC941 is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated transmission
Symbol
Symbol
t
t
frequency and thermal management.
signal transition times smaller than 3 ns can be applied to the MPC941.
line to a termination voltage of V
PLZ, HZ
t
t
V
PZL, LZ
Z
t
I
f
sk(PP)
sk(PP)
DC
V
C
V
V
t
t
V
C
CCQ
t
sk(O)
t
V
I
V
MAX
PLH
PHL
I
CMR
OUT
r
r
OZ
IN
PP
OH
OL
, t
, t
PD
IH
IL
IN
TT
Q
f
f
Input High Voltage
Input Low Voltage
Input Current
Peak-to-Peak Input Voltage
Common Mode Range
Output High Voltage
Output Low Voltage
Output Tristate Leakage Current
Output Impedance
Power Dissipation Capacitance
Input Capacitance
Maximum Quiescent Supply Current
Output Termination Voltage
Maximum Output Frequency
LVCMOS_CLK Input Rise/Fall Time
Propagation Delay
Output Disable Time
Output Enable Time
Output-to-Output Skew
Device-to-Device Skew
Device-to-Device Skew
Output Duty Cycle
Output Rise/Fall Time
CC
CC
Characteristics
Characteristics
TT
. Alternatively, the device drives up to two 50 Ω series terminated transmission lines.
= 3.3 V ± 5%, T
= 2.5 V ± 5%, T
LVCMOS_CLK to any Q
LVCMOS_CLK to any Q
LVCMOS_CLK to any Q
LVCMOS_CLK to any Q
LVCMOS_CLK to any Q
PECL_CLK to any Q
PECL_CLK to any Q
PECL_CLK to any Q
PECL_CLK to any Q
PECL_CLK to any Q
LVCMOS_CLK
LVCMOS_CLK
A
A
= –40 to +85°C)
= –40 to +85°C)
PECL_CLK,
PECL_CLK,
PECL_CLK
PECL_CLK
TT.
4
(1)
–0.3
Min
Min
500
1.2
0.9
0.2
1.7
1.1
1.8
45
45
0
18 – 20
V
7 – 8
Typ
CC
Typ
125
125
4.0
1.8
1.5
50
50
÷ 2
V
V
±120
CC
CC
250
Max
1.0
1000
1000
1400
1400
100
Max
0.7
0.6
250
250
10
2.6
2.3
1.0
60
55
5
+ 0.3
– 0.7
(3)
(2)
(1)
MPC941 REV. 8 APRIL 29, 2008
Unit
MHz
Unit
mV
mA
µA
µA
pF
pF
ns
ns
ns
ns
ns
ps
ps
ps
ps
ps
ns
%
%
V
V
V
V
V
Ω
V
0.8 to 2.0 V
For a given T
V
For any T
and Q
DC
DC
0.55 to 2.4 V
LVCMOS
LVCMOS
LVPECL
LVPECL
I
I
Per Output
All V
OH
OL
CC
REF
REF
, any Q
= 15 mA
Condition
= –15 mA
Condition
CC
= 50%
= 50%
Pins
A
, V
(2)
A
CC
(2)
and