TSEV81102G0TPZR3 E2V, TSEV81102G0TPZR3 Datasheet - Page 37

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TSEV81102G0TPZR3

Manufacturer Part Number
TSEV81102G0TPZR3
Description
Manufacturer
E2V
Datasheet

Specifications of TSEV81102G0TPZR3

Lead Free Status / RoHS Status
Not Compliant
Figure 10-8. Synchronous Reset Operation in DR/2 Mode, 1:8 ratio, 750 MHz (Full-speed) – Timings
Note:
If the reset rising edge had occurred in the second allowed window, the reset would have been effective on the fourth clock
rising edge (not represented, on the right of the edge represented with the arrow).
2105D–BDC–07/05
Allowed for the
Sync_RESET
Times Zones
The clock edge to which the reset applies is the one identified by the arrow.
Fs/2
reset
480 ps
680 ps min
680 ps
480 ps
680 ps
TS81102G0
667 PS
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