EVAL-ADUC834QS Analog Devices Inc, EVAL-ADUC834QS Datasheet - Page 72

• Manufacturer Part Number: EVAL-ADUC834QS
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADUC834QS

• Lead Free Status / RoHS Status: Not Compliant

ADuC834
Parameter
EXTERNAL DATA MEMORY READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
t
RLRH
AVLL
LLAX
RLDV
RHDX
RHDZ
LLDV
AVDV
LLWL
AVWL
RLAZ
WHLH
RD Pulsewidth
Address Valid after ALE Low
Address Hold after ALE Low
RD Low to Valid Data In
Data and Address Hold after RD
Data Float after RD
ALE Low to Valid Data In
Address to Valid Data In
ALE Low to RD Low
Address Valid to RD Low
RD Low to Address Float
RD High to ALE High
PORT 0 (I/O)
CORE_CLK
PORT 2 (O)
PSEN (O)
ALE (O)
RD (O)
t
AVLL
Figure 72. External Data Memory Read Cycle
A16–A23
A0–A7
(OUT)
t
AVDV
t
LLAX
t
AVWL
t
LLWL
12.58 MHz Core_Clk
Min
377
39
44
0
188
188
39
t
LLDV
–72–
t
RLAZ
t
RLDV
Max
232
89
486
550
288
0
119
A8–A15
t
DATA (IN)
RLRH
t
6t
t
t
0
3t
4t
t
RHDX
Min
CORE
CORE
CORE
CORE
CORE
CORE
Variable Core_Clk
– 40
– 35
– 40
– 100
– 50
– 130
t
WHLH
t
RHDZ
Max
5t
2t
8t
9t
3t
0
t
CORE
CORE
CORE
CORE
CORE
CORE
+ 40
– 165
– 70
– 150
– 165
+ 50
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
REV. A
Figure
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72
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