XC2V2000-4FGG676C Xilinx Inc, XC2V2000-4FGG676C Datasheet - Page 40
![FPGA Virtex-II™ Family 2M Gates 24192 Cells 650MHz 0.15um/0.12um (CMOS) Technology 1.5V 676-Pin FBGA](/photos/6/73/67300/b-676_sml.jpg)
XC2V2000-4FGG676C
Manufacturer Part Number
XC2V2000-4FGG676C
Description
FPGA Virtex-II™ Family 2M Gates 24192 Cells 650MHz 0.15um/0.12um (CMOS) Technology 1.5V 676-Pin FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-IIr
Datasheet
1.XC2V250-4FGG256C.pdf
(318 pages)
Specifications of XC2V2000-4FGG676C
Package
676FBGA
Family Name
Virtex-IIÂ
Device Logic Units
24192
Device System Gates
2000000
Number Of Registers
21504
Maximum Internal Frequency
650 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
456
Ram Bits
1032192
Number Of Labs/clbs
2688
Total Ram Bits
1032192
Number Of I /o
456
Number Of Gates
2000000
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1351
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2V2000-4FGG676C
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Routing
DCM Locations/Organization
Virtex-II DCMs are placed on the top and bottom of each
block RAM and multiplier column. The number of DCMs
depends on the device size, as shown in
Table 24: DCM Organization
Active Interconnect Technology
Local and global Virtex-II routing resources are optimized
for speed and timing predictability, as well as to facilitate IP
cores implementation. Virtex-II Active Interconnect Technol-
ogy is a fully buffered programmable routing matrix. All rout-
DS031-2 (v3.5) November 5, 2007
Product Specification
XC2V40
XC2V80
XC2V250
XC2V500
XC2V1000
XC2V1500
XC2V2000
XC2V3000
XC2V4000
XC2V6000
XC2V8000
Device
Switch
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Matrix
R
IOB
IOB
IOB
IOB
IOB
Columns
2
2
4
4
4
4
4
6
6
6
6
Switch
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Matrix
Table
Figure 48: Routing Resources
CLB
CLB
CLB
CLB
DCMs
IOB
24.
12
12
12
12
4
4
8
8
8
8
8
www.xilinx.com
Switch
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Matrix
ing resources are segmented to offer the advantages of a
hierarchical solution. Virtex-II logic features like CLBs,
IOBs, block RAM, multipliers, and DCMs are all connected
to an identical switch matrix for access to global routing
resources, as shown in
Each Virtex-II device can be represented as an array of
switch matrixes with logic blocks attached, as illustrated in
Figure
Switch
Switch
Switch
Matrix
Matrix
Matrix
CLB
CLB
CLB
CLB
Figure 47: Active Interconnect Technology
IOB
Virtex-II Platform FPGAs: Functional Description
48.
DCM
CLB
IOB
Switch
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Matrix
Figure
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
DCM
47.
BRAM
Switch
Switch
Switch
Switch
Switch
18Kb
Matrix
Matrix
Matrix
Matrix
Matrix
DS031_34_022205
Module 2 of 4
DS031_55_022205
18 x 18
MULT
32
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