XC2V2000-4FGG676C Xilinx Inc, XC2V2000-4FGG676C Datasheet - Page 102

• Manufacturer Part Number: XC2V2000-4FGG676C
• Description: FPGA Virtex-II™ Family 2M Gates 24192 Cells 650MHz 0.15um/0.12um (CMOS) Technology 1.5V 676-Pin FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-IIr

Specifications of XC2V2000-4FGG676C

• Package: 676FBGA
• Family Name: Virtex-II™
• Device Logic Units: 24192
• Device System Gates: 2000000
• Number Of Registers: 21504
• Maximum Internal Frequency: 650 MHz
• Typical Operating Supply Voltage: 1.5 V
• Maximum Number Of User I/os: 456
• Ram Bits: 1032192
• Number Of Labs/clbs: 2688
• Total Ram Bits: 1032192
• Number Of I /o: 456
• Number Of Gates: 2000000
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 676-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1351

FG256/FGG256 Fine-Pitch BGA Package
As shown in
FG256/FGG256 fine-pitch BGA package. The pins in the XC2V250, XC2V500, and XC2V1000 devices are same. The No
Connect columns show pin differences for the XC2V40 and XC2V80 devices. Following this table are the
Fine-Pitch BGA Package Specifications (1.00mm
Table 6: FG256/FGG256 BGA — XC2V40, XC2V80, XC2V250, XC2V500, and XC2V1000
DS031-4 (v3.5) November 5, 2007
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
R
Table
IO_L95N_0/GCLK7P
IO_L96N_0/GCLK5P
IO_L96N_1/GCLK3P
IO_L95N_1/GCLK1P
IO_L95P_0/GCLK6S
IO_L96P_0/GCLK4S
IO_L96P_1/GCLK2S
IO_L95P_1/GCLK0S
IO_L04N_0/VREF_0
IO_L94N_0/VREF_0
IO_L94P_1/VREF_1
IO_L03N_0/VRP_0
IO_L03P_0/VRN_0
6, XC2V40, XC2V80, XC2V250, XC2V500, and XC2V1000 Virtex-II devices are available in the
Pin Description
IO_L01N_0
IO_L02N_0
IO_L05N_0
IO_L92N_0
IO_L93N_0
IO_L94N_1
IO_L93N_1
IO_L92N_1
IO_L01P_0
IO_L02P_0
IO_L04P_0
IO_L05P_0
IO_L92P_0
IO_L93P_0
IO_L94P_0
IO_L93P_1
pitch).
Pin Number
www.xilinx.com
C10
D10
A10
B10
E10
C4
B4
D5
C5
B5
A5
D6
C6
B6
A6
E6
E7
D7
C7
B7
A7
D8
C8
B8
A8
A9
B9
C9
D9
No Connect in XC2V40
Virtex-II Platform FPGAs: Pinout Information
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
No Connect in XC2V80
FG256/FGG256
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Module 4 of 4
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