ATTINY12L-4PU Atmel, ATTINY12L-4PU Datasheet - Page 29

• Manufacturer Part Number: ATTINY12L-4PU
• Description: MCU 8-Bit ATtiny AVR RISC 1KB Flash 3.3V/5V 8-Pin PDIP
• Manufacturer: Atmel

Specifications of ATTINY12L-4PU

• Package: 8PDIP
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 4 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 6
• Interface Type: SPI
• Number Of Timers: 1
• Program Memory Size: 1 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C
• Processor Series: ATTINY1x
• Core: AVR8
• Maximum Clock Frequency: 4 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: PDIP-8
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Details

MCU Status Register –
MCUSR for the ATtiny12
1006F–AVR–06/07
To identify a reset condition, the user software should clear both the PORF and EXTRF
bits as early as possible in the program. Checking the PORF and EXTRF values is done
before the bits are cleared. If the bit is cleared before an external or watchdog reset
occurs, the source of reset can be found by using the following truth table:
Table 13. Reset Source Identification
The MCU Status Register provides information on which reset source caused an MCU
reset.
• Bit 7..4 - Res: Reserved Bits
These bits are reserved bits in the ATtiny12 and always read as zero.
• Bit 3 - WDRF: Watchdog Reset Flag
This bit is set if a watchdog reset occurs. The bit is reset by a power-on reset, or by writ-
ing a logic zero to the flag.
• Bit 2 - BORF: Brown-out Reset Flag
This bit is set if a brown-out reset occurs. The bit is reset by a power-on reset, or by writ-
ing a logic zero to the flag.
• Bit 1 - EXTRF: EXTernal Reset Flag
This bit is set if an external reset occurs. The bit is reset by a power-on reset, or by writ-
ing a logic zero to the flag.
• Bit 0 - PORF: Power-on Reset Flag
This bit is set if a power-on reset occurs. The bit is reset by writing a logic zero to the
flag.
To use the reset flags to identify a reset condition, the user should read and then reset
the MCUSR as early as possible in the program. If the register is cleared before another
reset occurs, the source of the reset can be found by examining the reset flags.
Bit
$34
Read/Write
Initial Value
EXTRF
0
1
0
1
R
7
0
-
R
6
0
-
PORF
R
0
0
1
1
5
0
-
R
4
0
-
Reset Source
Watchdog Reset
External Reset
Power-on Reset
Power-on Reset
WDRF
R/W
3
See Bit Description
BORF
R/W
2
EXTRF
ATtiny11/12
R/W
1
PORF
R/W
0
MCUSR
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