72T1875L5BBI Integrated Device Technology (Idt), 72T1875L5BBI Datasheet - Page 29

• Manufacturer Part Number: 72T1875L5BBI
• Description: FIFO Mem Async/Sync Dual Depth/Width Uni-Dir 16K x 18/32K x 9 144-Pin BGA
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 72T1875L5BBI

• Package: 144BGA
• Configuration: Dual
• Bus Directional: Uni-Directional
• Density: 288 Kb
• Organization: 16Kx18|32Kx9
• Data Bus Width: 9/18 Bit
• Timing Type: Asynchronous|Synchronous
• Expansion Type: Depth|Width
• Typical Operating Supply Voltage: 2.5 V
• Operating Temperature: -40 to 85 °C

JTAG TIMING SPECIFICATION
SYSTEM INTERFACE PARAMETERS
NOTE:
1. 50pf loading on external output signals.
IDT72T1845/55/65/75/85/95/105/115/125 2.5V TeraSync™ 18-BIT/9-BIT FIFO
8Kx9, 8Kx18/16Kx9, 16Kx18/32Kx9, 32Kx18/64Kx9, 64Kx18/128Kx9, 128Kx18/256Kx9, 256Kx18/512Kx9, 512Kx18/1Mx9
Data Output Hold
TRST
Data Output
Parameter
TDI/
TMS
TDO
TCK
Data Input
Symbol Test Conditions
t
t
DOH
DO
t
t
t
DS
DH
3
t
(1)
5
(1)
t
t
rise=3ns
fall=3ns
t
1
t
6
t
DS
t
4
t
TCK
Min.
10
10
t
0
-
DH
IDT72T18105
IDT72T18115
IDT72T18125
IDT72T1845
IDT72T1855
IDT72T1865
IDT72T1875
IDT72T1885
IDT72T1895
Figure 6. Standard JTAG Timing
Notes to diagram:
t1 = t
t2 = t
t3 = t
t4 = t
t5 = tRST
t6 = tRSR (reset recovery)
t
2
Max. Units
20
-
-
-
TCKRISE
TCKLOW
TCKHIGH
TCKFALL
(reset pulse width)
ns
ns
ns
29
(v
JTAG
AC ELECTRICAL CHARACTERISTICS
NOTE:
1. Guaranteed by design.
JTAG Clock Input Period t
JTAG Clock HIGH
JTAG Clock Low
JTAG Clock Rise Time
JTAG Clock Fall Time
JTAG Reset
JTAG Reset Recovery
cc = 2.5V
Parameter
2Kx18/4Kx9, 4Kx18/
±
5%; Tcase = 0°C to +85°C)
Symbol
t
t
t
t
t
t
TCK
TCKHIGH
TCKLOW
TCKRISE
TCKFALL
RST
RSR
COMMERCIAL AND INDUSTRIAL
Conditions
t
DO
Test
-
-
-
-
-
-
-
TEMPERATURE RANGES
FEBRUARY 10, 2009
Min. Max. Units
100
40
40
50
50
-
-
TDO
5
5
5909 drw10
-
-
-
-
-
(1)
(1)
ns
ns
ns
ns
ns
ns
ns