SI5326C-C-GM Silicon Laboratories Inc, SI5326C-C-GM Datasheet - Page 35

• Manufacturer Part Number: SI5326C-C-GM
• Description: DSPLL 36-Pin QFN EP
• Manufacturer: Silicon Laboratories Inc
• Type: Jitter Attenuatorr

Specifications of SI5326C-C-GM

• Package: 36QFN EP
• Operating Temperature: -40 to 85 °C
• Pll: Yes
• Input: Clock
• Output: CML, CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: Yes/Yes
• Frequency - Max: 346MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 1.71 V ~ 3.63 V
• Mounting Type: Surface Mount
• Package / Case: 36-QFN
• Frequency-max: 346MHz
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: QFN EP
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 336-1746; 336-1746-5; 336-1746

Reset value = 1101 1111
Register 22.
Name
Type
7:4
Bit
Bit
3
2
1
0
CK_ACTV_
CK_BAD_
LOL_POL
Reserved
INT_POL
Name
D7
POL
POL
Reserved.
CK_ACTV_POL.
Sets the active polarity for the CS_CA signals when reflected on an output pin.
0: Active low
1: Active high
CK_BAD_POL.
Sets the active polarity for the INT_C1B and C2B signals when reflected on output pins.
0: Active low
1: Active high
LOL_POL.
Sets the active polarity for the LOL status when reflected on an output pin.
0: Active low
1: Active high
INT_POL.
Sets the active polarity for the interrupt status when reflected on the INT_C1B output pin.
0: Active low
1: Active high
D6
Reserved
R
D5
Rev. 1.0
D4
CK_ACTV_
Function
POL
R/W
D3
CK_BAD_
POL
R/W
D2
LOL_POL
R/W
D1
Si5326
INT_POL
R/W
D0
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