SI5326C-C-GM Silicon Laboratories Inc, SI5326C-C-GM Datasheet - Page 31

DSPLL 36-Pin QFN EP

SI5326C-C-GM

Manufacturer Part Number
SI5326C-C-GM
Description
DSPLL 36-Pin QFN EP
Manufacturer
Silicon Laboratories Inc
Type
Jitter Attenuatorr
Datasheet

Specifications of SI5326C-C-GM

Package
36QFN EP
Operating Temperature
-40 to 85 °C
Pll
Yes
Input
Clock
Output
CML, CMOS, LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Frequency - Max
346MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
1.71 V ~ 3.63 V
Mounting Type
Surface Mount
Package / Case
36-QFN
Frequency-max
346MHz
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
QFN EP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1746
336-1746-5
336-1746

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5326C-C-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
SI5326C-C-GMR
Quantity:
1 507
Reset value = 1000 0000
Reset value = 0000 0000
Register 17.
Register 18.
Name
Name
Type
Type
6:0
7:0
Bit
Bit
Bit
Bit
7
FLAT_VALID FLAT_VALID.
FLAT [14:8]
FLAT [7:0]
FLAT_
VALID
R/W
Name
Name
D7
D7
Before writing a new FLAT[14:0] value, this bit must be set to zero, which causes the
existing FLAT[14:0] value to be held internally for use while the new value is being writ-
ten. Once the new FLAT[14:0] value is completely written, set FLAT_VALID = 1 to enable
its use.
0: Memorize existing FLAT[14:0] value and ignore intermediate register values during
write of new FLAT[14:0] value.
1: Use FLAT[14:0] value directly from registers.
FLAT [14:8].
Fine resolution control for overall device skew from input clocks to output clocks. Positive
values increase the skew. See DSPLLsim for details.
FLAT [14:0] is a 2’s complement number.
FLAT [7:0].
Fine resolution control for overall device skew from input clocks to output clocks. Positive
values increase the skew. See DSPLLsim for details.
FLAT [14:0] is a 2’s complement number.
D6
D6
D5
D5
Rev. 1.0
D4
D4
FLAT [7:0]
R/W
FLAT [14:8]
Function
Function
R/W
D3
D3
D2
D2
D1
D1
Si5326
D0
D0
31

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