74LVC1G17GW-G NXP Semiconductors, 74LVC1G17GW-G Datasheet - Page 16

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74LVC1G17GW-G

Manufacturer Part Number
74LVC1G17GW-G
Description
Schmitt Trigger Buffer 1-CH Non-Inverting CMOS 5-Pin TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC1G17GW-G

Package
5TSSOP
Logic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number Of Outputs Per Chip
1
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
3.2(Typ)@2.7V|3(Typ)@3.3V|2.2(Typ)@5V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting
NXP Semiconductors
15. Abbreviations
Table 12.
16. Revision history
Table 13.
74LVC1G17
Product data sheet
Acronym
CMOS
DUT
ESD
HBM
MM
TTL
Document ID
74LVC1G17 v.7
Modifications:
74LVC1G17 v.6
74LVC1G17 v.5
74LVC1G17 v.4
74LVC1G17 v.3
74LVC1G17 v.2
74LVC1G17 v.1
Abbreviations
Revision history
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
Release date
20101110
20070827
20061006
20041130
20041018
20040407
20040324
Added type number 74LVC1G17GN (SOT1115 / XSON6 package).
Added type number 74LVC1G17GS (SOT1202 / XSON6 package).
All information provided in this document is subject to legal disclaimers.
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product specification
Product specification
Product specification
Product specification
Rev. 7 — 10 November 2010
Change notice
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Single Schmitt trigger buffer
74LVC1G17
Supersedes
74LVC1G17 v.6
74LVC1G17 v.5
74LVC1G17 v.4
74LVC1G17 v.3
74LVC1G17 v.2
74LVC1G17 v.1
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© NXP B.V. 2010. All rights reserved.
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