74LVC1G17GW-G NXP Semiconductors, 74LVC1G17GW-G Datasheet - Page 11

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74LVC1G17GW-G

Manufacturer Part Number
74LVC1G17GW-G
Description
Schmitt Trigger Buffer 1-CH Non-Inverting CMOS 5-Pin TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC1G17GW-G

Package
5TSSOP
Logic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number Of Outputs Per Chip
1
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
3.2(Typ)@2.7V|3(Typ)@3.3V|2.2(Typ)@5V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting
NXP Semiconductors
Fig 14. Package outline SOT753 (SC-74A)
74LVC1G17
Product data sheet
Plastic surface-mounted package; 5 leads
DIMENSIONS (mm are the original dimensions)
UNIT
mm
VERSION
OUTLINE
SOT753
1.1
0.9
A
y
0.100
0.013
A 1
5
1
0.40
0.25
b p
e
IEC
0.26
0.10
c
D
2
3.1
2.7
D
b p
All information provided in this document is subject to legal disclaimers.
JEDEC
1.7
1.3
E
REFERENCES
0
Rev. 7 — 10 November 2010
4
3
0.95
e
w
M
H E
3.0
2.5
B
SC-74A
B
JEITA
scale
1
0.6
0.2
L p
0.33
0.23
Q
2 mm
A
0.2
v
A 1
0.2
w
H E
E
PROJECTION
0.1
EUROPEAN
Single Schmitt trigger buffer
y
detail X
74LVC1G17
Q
L p
A
© NXP B.V. 2010. All rights reserved.
ISSUE DATE
02-04-16
06-03-16
X
c
v
SOT753
M
A
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