AT84CS001VTPY E2V, AT84CS001VTPY Datasheet - Page 11

• Manufacturer Part Number: AT84CS001VTPY
• Description: Demultiplexer 240-Pin EBGA
• Manufacturer: E2V

Specifications of AT84CS001VTPY

• Package: 240EBGA
• Power Supply Type: Analog|Digital
• Typical Supply Current: 600 mA
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 2.375|3.15 V
• Maximum Operating Supply Voltage: 2.625|3.45 V

3.7
3.8
e2v semiconductors SAS 2009
Power Reduction Mode (SLEEP)
Standalone Delay Cell (DAI, DAIN) (DAO, DAON)
The power reduction mode saves up to 60% of power consumption. In this mode, the DMUX delivers an
arbitrary digital output pattern with LVDS logic states (no toggling).
The power reduction mode is enabled by the SLEEP input. SLEEP is activated on logic LOW
(grounded), and deactivated on logic HIGH (10 KΩ to Ground, or tied to V
A standalone tunable delay cell is provided. The delay line is controlled via the DACTRL analog control
input. The tuning range is about 550 ps for DACTRL varying from V
The (DAI, DAIN) and (DAO, DAON) are LVDS compatible input and output respectively. The Standalone
Delay Cell is enabled by the DAEN input.
DAEN is activated on Logic Low (Grounded), and deactivated on Logic High (10 KΩ to ground, or tied to
V
Figure 3-10. Block Diagram of the Standalone Delay Cell
CCD
= 3.3V, or left floating).
(DAI, DAIN)
DACTRL
2
(550 ps tuning range)
Delay
DAEN (active LOW)
2
CCD
/ 3 to (2 × V
(DAO, DAON)
CCD
= 3.3V, or left floating).
0809E–BDC–05/09
AT84CS001
CCD
)/ 3.
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