DS26528 Maxim Integrated Products, DS26528 Datasheet - Page 265

• Manufacturer Part Number: DS26528
• Description: Network Controller & Processor ICs Octal E1-T1-J1 Singl e-Chip Transceiver (
• Manufacturer: Maxim Integrated Products

Specifications of DS26528

• Product: Framer
• Number Of Transceivers: 8
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 875 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TE-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.1.11 Capture-IR
The Capture-IR state is used to load the shift register in the instruction register with a fixed value. This value is
loaded on the rising edge of JTCLK. If JTMS is HIGH on the rising edge of JTCLK, the controller enters the Exit1-
IR state. If JTMS is LOW on the rising edge of JTCLK, the controller enters the Shift-IR state.
13.1.12
In this state, the shift register in the instruction register is connected between JTDI and JTDO and shifts data one
stage for every rising edge of JTCLK towards the serial output. The parallel register, as well as all test registers,
remains at their previous states. A rising edge on JTCLK with JTMS HIGH moves the controller to the Exit1-IR
state. A rising edge on JTCLK with JTMS LOW keeps the controller in the Shift-IR state while moving data one
stage thorough the instruction shift register.
13.1.13
A rising edge on JTCLK with JTMS LOW puts the controller in the Pause-IR state. If JTMS is HIGH on the rising
edge of JTCLK, the controller enters the Update-IR state and terminates the scanning process.
13.1.14
Shifting of the instruction shift register is halted temporarily. With JTMS HIGH, a rising edge on JTCLK puts the
controller in the Exit2-IR state. The controller remains in the Pause-IR state if JTMS is LOW during a rising edge on
JTCLK.
13.1.15
A rising edge on JTCLK with JTMS LOW puts the controller in the Update-IR state. The controller loops back to
Shift-IR if JTMS is HIGH during a rising edge of JTCLK in this state.
13.1.16
The instruction code shifted into the instruction shift register is latched into the parallel output on the falling edge of
JTCLK as the controller enters this state. Once latched, this instruction becomes the current instruction. A rising
edge on JTCLK with JTMS LOW puts the controller in the Run-Test-Idle state. With JTMS HIGH, the controller
enters the Select-DR-Scan state.
Shift-IR
Exit1-IR
Pause-IR
Exit2-IR
Update-IR
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DS26528 Octal T1/E1/J1 Transceiver