DS26504LNB2 Maxim Integrated Products, DS26504LNB2 Datasheet - Page 99

• Manufacturer Part Number: DS26504LNB2
• Description: Network Controller & Processor ICs T1-E1-J1-64kHz Compo 4kHz Composite Clock
• Manufacturer: Maxim Integrated Products

Specifications of DS26504LNB2

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14. LOOPBACK CONFIGURATION
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bits 0, 1, 4 to 7: Unused, must be set = 0 for proper operation.
Bit 2: Remote Loopback (RLB). In this loopback, data received at RTIP and RRING will be looped back to the transmit LIU.
Received data will continue to pass through the receive side framer of the DS26504 as it would normally and the data from the
transmit side formatter will be ignored.
Bit 3: Local Loopback (LLB). In this loopback, data will continue to be transmitted as normal through the transmit side of the
DS26504. Data being received at RTIP and RRING will be replaced with the data being transmitted. Data in this loopback will
pass through the jitter attenuator if enabled.
0 = loopback disabled
1 = loopback enabled
0 = loopback disabled
1 = loopback enabled
—
7
0
0
LBCR
Loopback Control Register
20h
—
6
0
0
—
5
0
0
—
4
0
0
99 of 129
LLB
3
0
0
PIN 60
RLB
RLB
2
0
—
1
0
0
—
0
0
0