DS26504LNB2 Maxim Integrated Products, DS26504LNB2 Datasheet - Page 127

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DS26504LNB2

Manufacturer Part Number
DS26504LNB2
Description
Network Controller & Processor ICs T1-E1-J1-64kHz Compo 4kHz Composite Clock
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS26504LNB2

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DS26504LNB2+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Figure 20-11. Transmit Timing—T1, E1, 64KCC Mode
RCLK, JA CLOCK
(REFER TO THE TRANSMIT PLL BLOCK DIAGRAM, 3-3.)
NOTE 1: TS_8K_4 IN OUTPUT MODE.
NOTE 2: TS_8K_4 IN INPUT MODE.
NOTE 3: TX CLOCK IS THE INTERNAL CLOCK THAT DRIVES THE TRANSMIT SECTION. THE
SOURCE OF THIS SIGNAL DEPENDS ON THE CONFIGURATION OF THE TRANSMIT PLL. IF TX
CLOCK IS GENERATED BY THE TRANSMIT PLL (CONVERSION FROM ANOTHER CLOCK RATE)
THEN THE USER SHOULD OUTPUT THAT SIGNAL ON THE PLL_OUT PIN AND USE THAT SIGNAL
TO REFERENCE TSER AND TS_8K_4 IF TS_8K_4 IS IN THE INPUT MODE.
NOTE 4: RCLK (THE RECOVERED LINE CLOCK) AND JA CLOCK (AN INTERNAL CLOCK DERIVED
FROM MCLK) MAY BE SELECTED AS THE SOURCE FOR THE TRANSMIT PLL OR USED
UNCONVERTED FOR TX CLOCK.
TX CLOCK
TS_8K_4
TS_8K_4
TSER
PLL_OUT
TCLK
1
2
t
R
3
4
t D3
F t
t D2
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t SU
t SU
t HD
t
CL
t
CP
t
CH

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