DS26504LNB2 Maxim Integrated Products, DS26504LNB2 Datasheet - Page 66
DS26504LNB2
Manufacturer Part Number
DS26504LNB2
Description
Network Controller & Processor ICs T1-E1-J1-64kHz Compo 4kHz Composite Clock
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26504L.pdf
(129 pages)
Specifications of DS26504LNB2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
Quantity
Price
Company:
Part Number:
DS26504LNB2+
Manufacturer:
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12.1.1 Sa Bit Change of State
The DS26504 can provide an interrupt whenever one of the multiframe based Sa bit patterns changes.
Using the SR5 and IMR5 registers, the user can enable interrupts on a change of state for Sa4, Sa5, Sa6,
Sa7 and Sa8 multiframe bit patterns. This function is useful for monitoring the Sa6-based SSM message.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bit 0: Sa4 Change of State (Sa4COS). Set when any Sa4 bit in the 16-frame multiframe has changed state.
Bit 1: Sa5 Change of State (Sa5COS). Set when any Sa5 bit in the 16-frame multiframe has changed state.
Bit 2: Sa6 Change of State (Sa6COS). Set when any Sa6 bit in the 16-frame multiframe has changed state.
Bit 3: Sa7 Change of State (Sa7COS). Set when any Sa7 bit in the 16-frame multiframe has changed state.
Bit 4: Sa8 Change of State (Sa8COS). Set when any Sa8 bit in the 16-frame multiframe has changed state.
Bits 5, 6, 7: Unused
—
X
7
0
SR5
Status Register 5
21h
—
X
6
0
—
X
5
0
Sa8COS
X
4
0
66 of 129
Sa7COS
X
3
0
Sa6COS
X
2
0
Sa5COS
X
1
0
Sa4COS
X
0
0
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