DS26504LNB2 Maxim Integrated Products, DS26504LNB2 Datasheet - Page 40

• Manufacturer Part Number: DS26504LNB2
• Description: Network Controller & Processor ICs T1-E1-J1-64kHz Compo 4kHz Composite Clock
• Manufacturer: Maxim Integrated Products

Specifications of DS26504LNB2

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8. T1 FRAMER/FORMATTER CONTROL REGISTERS
The T1 framer portion of the DS26504 is configured via a set of five control registers. Typically, the
control registers are only accessed when the system is first powered up. Once the DS26504 has been
initialized, the control registers only need to be accessed when there is a change in the system
configuration. There are two receive control registers (T1RCR1 and T1RCR2), two transmit control
registers (T1TCR1 and T1TCR2), and a common control register (T1CCR). Each of these registers is
described in this section.
8.1 T1 Control Registers
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bit 0: Resynchronize (RESYNC). When toggled from low to high, a resynchronization of the receive side framer is initiated.
Must be cleared and set again for a subsequent resync.
Bit 1: Sync Enable (SYNCE)
Bit 2: Sync Time (SYNCT)
Bit 3: Sync Criterion (SYNCC)
Bits 4 and 5: Out-of-Frame Select Bits (OOF2, OOF1)
Bit 6: Auto Resync Criterion (ARC)
Bit 7: Unused, must be set = 0 for proper operation.
OOF2
0
0
1
1
0 = auto resync enabled
1 = auto resync disabled
0 = qualify 10 bits
1 = qualify 24 bits
In D4 Framing Mode:
0 = search for Ft pattern, then search for Fs pattern
1 = cross-couple Ft and Fs pattern
In ESF Framing Mode:
0 = search for FPS pattern only
1 = search for FPS and verify with CRC6
0 = resync on OOF or RLOS event
1 = resync on OOF only
OOF1
—
7
0
0
0
1
0
1
ARC
T1RCR1
T1 Receive Control Register 1
03h
6
0
0
2/4 frame bits in error
2/5 frame bits in error
2/6 frame bits in error
2/6 frame bits in error
OUT-OF-FRAME
CRITERION
OOF1
5
0
0
OOF2
4
0
0
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SYNCC
3
0
0
SYNCT
2
0
0
SYNCE
1
0
0
RESYNC
0
0
0