LAN89218AQ SMSC, LAN89218AQ Datasheet - Page 68

• Manufacturer Part Number: LAN89218AQ
• Description: Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl
• Manufacturer: SMSC

Specifications of LAN89218AQ

• Ethernet Connection Type: 10BASE-T, 100BASE-TX
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE802.3, IEEE802.3u
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.3 (02-23-10)
3.13.1.1
3.13.1.2
Receive Data FIFO Fast Forward
The RX data path implements an automatic data discard function. Using the RX data FIFO Fast
Forward bit (RX_FFWD) in the RX_DP_CTRL register, the host can instruct the LAN89218 to skip the
packet at the head of the RX data FIFO. The RX data FIFO pointers are automatically incremented to
the beginning of the next RX packet.
When performing a fast-forward, there must be at least 4 DWORDs of data in the RX data FIFO for
the packet being discarded. For less than 4 DWORDs do not use RX_FFWD. In this case data must
be read from the RX data FIFO and discarded using standard PIO read operations.
After initiating a fast-forward operation, do not perform any reads of the RX data FIFO until the
RX_FFWD bit is cleared. Other resources can be accessed during this time (i.e., any registers and/or
the other three FIFOs). Also note that the RX_FFWD will only fast-forward the RX data FIFO, not the
RX status FIFO.
The receiver does not have to be stopped to perform a fast-forward operation.
Force Receiver Discard (Receiver Dump)
In addition to the Receive data Fast Forward feature, LAN89218 also implements a receiver "dump"
feature. This feature allows the host processor to flush the entire contents of the RX data and RX
status FIFOs. When activated, the read and write pointers for the RX data and status FIFOs will be
returned to their reset state. To perform a receiver dump, the LAN89218 receiver must be halted. Once
the receiver stop completion is confirmed, the RX_DUMP bit can be set in the RX_CFG register. The
RX_DUMP bit is cleared when the dump is complete. For more information on stopping the receiver,
please refer to
on the RX_DUMP bit, please refer to
page
91.
Section 3.13.4, "Stopping and Starting the Receiver," on page
High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
DATASHEET
Section 5.3.7, "RX_CFG—Receive Configuration Register," on
68
71. For more information
SMSC LAN89218
Datasheet