LAN89218AQ SMSC, LAN89218AQ Datasheet - Page 48

Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl

LAN89218AQ

Manufacturer Part Number
LAN89218AQ
Description
Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl
Manufacturer
SMSC
Datasheet

Specifications of LAN89218AQ

Ethernet Connection Type
10BASE-T, 100BASE-TX
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE802.3, IEEE802.3u
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATION NOTE: Under normal conditions, the READY bit in PMT_CTRL will be set (high -”1”) within 2 ms. If
Revision 1.3 (02-23-10)
3.10
3.10.1
3.10.2
The LAN89218 supports power-down modes to allow applications to minimize power consumption. The
following sections describe these modes.
System Description
Power is reduced to various modules by disabling the clocks as outlined in Table 3.11, “Power
Management States,” on page 50. All configuration data is saved when in either of the two low power
states. Register contents are not affected unless specifically indicated in the register description.
Functional Description
There is one normal operating power state, D0 and there are two power saving states: D1, and D2.
Upon entry into either of the two power saving states, only the PMT_CTRL register is accessible for
read operations. In either of the power saving states the READY bit in the PMT_CTRL register will be
cleared. Reads of any other addresses are forbidden until the READY bit is set. All writes, with the
exception of the wakeup write to BYTE_TEST, are also forbidden until the READY bit is set. Only when
in the D0 (Normal) state, when the READY bit is set, can the rest of the device be accessed.
Note 3.4 The LAN89218 must always be read at least once after power-up, reset, or upon return from
In system configurations where the PME signal is shared amongst multiple devices, the WUPS field
within the PMT_CTRL register can be read to determine which LAN89218 device is driving the PME
signal.
When the LAN89218 is in a power saving state (D1 or D2), a write cycle to the BYTE_TEST register
will return the LAN89218 to the D0 state.
Components,” on page 147
page
Note 3.5 When the LAN89218 is in a power saving state, a write of any data to the BYTE_TEST
After issuing a write to the BYTE_TEST register to wake the LAN89218 from a power-down state, the
READY bit in PMT_CTRL will assert (set High) within 2 ms.
Power Management
147, shows the power consumption values for each power state.
the software driver polls this bit and it is not set within 100ms, then an error condition
occurred.
a power-saving state, otherwise write operations will not function.
register will wake-up the device. DO NOT PERFORM WRITES TO OTHER
ADDRRESSES while the READY bit in the PMT_CTRL register is cleared.
High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
and
Table 7.3, “Power Consumption Device and System Components,” on
DATASHEET
48
Table 7.3, “Power Consumption Device and System
SMSC LAN89218
Datasheet

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