VS6502V015/T2 STMicroelectronics, VS6502V015/T2 Datasheet - Page 10

• Manufacturer Part Number: VS6502V015/T2
• Description: SENSOR COLOR VGA CMOS SMOP
• Manufacturer: STMicroelectronics
• Type: CMOS Imagingr

Specifications of VS6502V015/T2

• Pixel Size: 5.6µm x 5.6µm
• Active Pixel Array: 644H x 484V
• Frames Per Second: 30
• Voltage - Supply: 2.6 V ~ 3.6 V
• Package / Case: SMOP2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3884-1

Functional Description
2.3 Data format
2.3.1
10/48
The video interface consists of a mono-directional, tri-stateable 5 wire data bus.
There are two data output modes controlled by serial register [23]
5 - wire output mode
4 - wire output mode
QCLK Control
QCLK Type
The QCLK output (only available in 4-wire mode) may be one of two different types, controlled via
serial register [20]
This is illustrated in
(slow) QCLK
(fast) QCLK
4- wire mode: data is 8 bits per pixel, output as two 4-bit nibbles, most significant nibble first.
In this mode a data qualification clock is also provided.
5-wire mode: data is 10 bits per pixel, output as two 5-bit nibbles, most significant nibble first.
, on 4 wires. In this mode there is NO qualification clock
SLOW: in this mode the rising edge of QCLK qualifies the MS nibble of each pixel and the
falling edge of QCLK qualifies the LS nibble
FAST: in this mode the falling edge of QCLK is used to qualify bith nibbles.
DOUT
qualifies both LSB & MSB
Figure 10
QCLK falling edge
D
4
D
,D
3
Figure 9: Digital data output modes
,D
3
,D
2
,D
2
Figure 10: Pixel output timing
,D
1
below;..
MSB
,D
1
,D
0
0
D
9
D
,D
7
,D
8
,D
6
LSB
,D
7
,D
5
10-bit pixel data
8-bit pixel data
,D
6
,D
4
5
QCLK rising edge
qualifies MSB
D
4
D
,D
MSB
3
,D
3
,D
2
,D
2
Pixel DATA
,D
1
,D
1
,D
0
0
QCLK falling edge
qualifies LSB
LSB
D
9
D
,D
7
,D
8
,D
6
,D
7
,D
5
,D
6
,D
4
5
VS6502