KSZ8893FQL-FX Micrel Inc, KSZ8893FQL-FX Datasheet - Page 27

• Manufacturer Part Number: KSZ8893FQL-FX
• Description: 2+1 Port 10/100 Switch W/Tranceivers & Frame Buffers, ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8893FQL-FX

• Controller Type: Ethernet Switch Controller
• Interface: MII, RMII, SNI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Data Rate: 1000Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1603 - EVAL KIT EXPERIMENTAL KSZ8893MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3273

Micrel, Inc.
10Base-FL Operation
10Base-FL operation is supported on port 1 of the KSZ8893FQL. It conforms to clause 15 and 18 of the IEEE802.3
Standard for 10Base-FL fiber operation. Refer to the Standard for details.
In a typical application, the KSZ8893FQL provides media conversion from 10Base-FL fiber on port 1 to 10Base-T
copper on port 2. Alternatively, port 2 can be substituted with port 3 to directly connect to an external MAC.
Physical Interface
For 10Base-FL operation, port 1 interfaces with an external fiber module to drive 850nm fiber optic links. The interface
connections between the KSZ8893FQL and fiber module are single-ended (common mode). 10Base-FL signal
transmission and reception are done on TXM1 (pin 49) and RXM1 (pin 46), respectively. Refer to Micrel reference
schematic for recommended interface circuit and termination.
Enabling 10Base-FL Mode
To enable 10Base-FL mode, tie FXSD1 (pin 44) high to +3.3V and MUX2 (pin 41) low-to-ground. Port 1 should also be
configured with auto-negotiation disabled, forced to 10Mbps for the speed, and set to either half or full duplex.
Optionally, flow control can be enabled to send out PAUSE frames in full duplex mode.
The 10Base-FL settings use the same strapping pins, MIIM registers and port registers as 10Base-T copper. These
settings are summarized in the following table.
100Base-SX Operation
100Base-SX operation is supported on port 1 of the KSZ8893FQL. It conforms to the TIA/EIA-785 Standard for
100Base-SX fiber operation. Refer to the Standard for details.
In a typical application, the KSZ8893FQL provides media conversion from 100Base-SX fiber on port 1 to 100Base-TX
copper on port 2. Alternatively, port 2 can be substituted with port 3 to directly connect to an external MAC.
Physical Interface
For 100Base-SX operation, port 1 interfaces with an external fiber module to drive 850nm fiber optic links. The interface
connections between the KSZ8893FQL and fiber module are single-ended (common mode). 100Base-SX signal
transmission and reception are done on TXM1 (pin 49) and RXM1 (pin 46), respectively. Refer to Micrel’s reference
schematic for recommended interface circuit and termination.
Enabling 100Base-SX Mode
To enable 100Base-SX mode, tie FXSD1 (pin 44) high to +3.3V and MUX2 (pin 41) low-to-ground. Port 1 should also
be configured with auto-negotiation disabled, forced to 100Mbps for the speed, and set to either half or full duplex.
Optionally, flow control can be enabled to send out PAUSE frames in full duplex mode.
The 100Base-SX settings use the same strapping pins, MIIM registers and port registers as 100Base-TX copper. These
settings are summarized in the following table.
October 2007
10Base-FL Settings
Auto-Negotiation (disable only)
Speed (10Mbps only)
Duplex (half or full)
Forced Flow Control (option)
Strapping Pin (#)
P1ANEN (30)
Table 3. 10Base-FL Configuration
P1SPD (31)
P1DPX (32)
P1FFC (33)
27
MIIM Register #, Bit[#]
Reg. 0, Bit[12]
Reg. 0, Bit[13]
Reg. 0, Bit[8]
---
Port Register #, Bit[#]
Reg. 28, Bit[7]
Reg. 28, Bit[6]
Reg. 28, Bit[5]
Reg. 18, Bit[4]
M9999-101607-1.3
KSZ8893FQL