KSZ8842-PMBL Micrel Inc, KSZ8842-PMBL Datasheet - Page 42

• Manufacturer Part Number: KSZ8842-PMBL
• Description: 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-PMBL

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1636 - BOARD EVALUATION KSZ8842-PMQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3089

Micrel, Inc.
Configuration Base Memory Address Register (CBMA Offset 10H)
The CBMA register specifies the base memory address for accessing the KSZ8842-PMQL/PMBL CSRs. This register
must be initialized prior to accessing any CSR with memory access.
The following table shows the CBMA register bit fields.
Subsystem ID Register (CSID Offset 2CH)
The CSID register is a read-only 32-bit register. The content of the CSID is loaded from the EEPROM after a hardware
reset. The loading period lasts at least 27,400 PCI cycles when the system is in 33MHz mode, and starts 50 cycles
after hardware reset deassertion. If the host accesses the CSID before its content is loaded from the EEPROM, the
KSZ8842-PMQL/PMBL responds with retry termination on the PCI bus.
The following table shows the CSID register bit fields.
The following table shows the access rules of the register.
Configuration Interrupt Register (CFIT Offset 3CH)
The CFIT register is divided into two sections: the interrupt line and the interrupt pin/ball. CFIT configures both the
system’s interrupt and the KSZ8842-PMQL/PMBL interrupt pin/ball connection.
The following table shows the CFIT register bit fields.
October 2007
31 – 16
Category
Value after hardware reset
Write access rules
31 – 24
23 – 16
31 - 11
15 – 0
15 – 8
10 - 1
Bit
Bit
Bit
0
Description
Subsystem ID
Indicates a 16-bit field containing the subsystem ID.
Subsystem Vendor ID
Indicates a 16-bit field containing the subsystem vendor ID.
Default
Default
0x28
0x14
0x01
0
0
0
Description
Configuration Base Memory Address
Defines the base address assigned for mapping the KSZ8841-PMQL/PMBL
CSRs.
This field value is 0 when read.
Memory Space Indicator
Determines that the register maps into the Memory space.
The value in this field is 0.
This is a read-only field.
Description
MAX_LAT
This field indicates how often the device needs to gain access to the PCI bus.
Time unit is equal to 0.25µs, assuming a PCI clock frequency of 33 MHz.
The value after a hardware reset is 28H (10µs).
MIN_GNT
This field indicates the burst period length that the device needs. Time unit is
equal to 0.25µs, assuming a PCI clock frequency of 33 MHz.
The value after a hardware reset is 14H (5µs).
Interrupt Pin/ball
Indicates which interrupt pin/ball that the KSZ8842-PMQL/PMBL uses. The
KSZ8842-PMQL/PMBL uses INTA# and the read value is 1H.
Description
Read from EEPROM.
Write has no effect on the KSZ8842-PMQL/PMBL.
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KSZ8842-PMQL/PMBL
M9999-100207-1.5