KSZ8842-PMBL Micrel Inc, KSZ8842-PMBL Datasheet - Page 38

• Manufacturer Part Number: KSZ8842-PMBL
• Description: 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface ( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-PMBL

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1636 - BOARD EVALUATION KSZ8842-PMQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3089

Micrel, Inc.
The following table shows the TDES2 register bit fields.
October 2007
23 – 20
19 – 11
10 – 0
31 - 0
Bit
Bit
28
27
26
25
24
Description
IPCKG IP Checksum Generate
When set, the KSZ8842-PMQL/PMBL will generate correct IP checksum for outgoing frames
that contains IP protocol header. The KSZ8842-PMQL/PMBL supports only a standard IP
header, i.e., IP with a 20 byte header. When this feature is used, ADD CRC bit in the
transmit mode register should always be set.
This bit is used as a per-packet control when the IP checksum generate bit in the transmit
mode register is not set.
This bit should be always set for multiple-segment packets.
TCPCKG TCP Checksum Generate
When set, the KSZ8842-PMQL/PMBL will generate correct TCP checksum for outgoing
frames that contains IP and TCP protocol header. The KSZ8842-PMQL/PMBL supports only
a standard IP header, i.e., IP with a 20 byte header. When this feature is used, ADD CRC bit
in the transmit mode register should always be set.
This bit is used as a per-packet control when the TCP checksum generate bit in the transmit
mode register is not set.
This bit should be always set for multiple-segment packets.
UDPCKG UDP Checksum Generate
When set, the KSZ8842-PMQL/PMBL will generate correct UDP checksum for outgoing
frames that contains a IP and UDP protocol header. The KSZ8842-PMQL/PMBL supports
only a standard IP header, i.e., IP with a 20 byte header. When this feature is used, ADD
CRC bit in the transmit mode register should always be set.
This bit is used as a per-packet control when the UDP checksum generate bit in the transmit
mode register is not set.
TER Transmit End of Ring
When set, indicates that the descriptor pointer has reached its final descriptor.
The KSZ8842-PMQL/PMBL returns to the base address of the list, forming a descriptor ring.
Reserved
SPN Switch Engine Destination Port Map
When set, this field indicates the destination port(s) where the packet will be forwarded to.
If bit 20 is set, it indicates the packet was received from port 1. If bit 21 is set, it indicates the
packet was received from port 2.
Setting all ports to 1 will cause the switch engine to broadcast the packet.
Setting all bits to 0 has no effect. The switch engine forwards the packet according to its
internal switch lookup algorithm.
This field is valid only when the last descriptor is set.
(Bits 23 and 22 are not used, but reserved for backward compatibility and future expansion.)
Reserved
TBS Transmit Buffer Size
Indicates the size, in bytes, of the transmit data buffer.
If this field is 0, the KSZ8842-PMQL/PMBL ignores this buffer and moves to the next
descriptor.
Description
Buffer Address
Indicates the physical memory address of the buffer.
There is no limitation on the transmit buffer address alignment.
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KSZ8842-PMQL/PMBL
M9999-100207-1.5