EVAL-AD5560EBUZ Analog Devices Inc, EVAL-AD5560EBUZ Datasheet - Page 43
EVAL-AD5560EBUZ
Manufacturer Part Number
EVAL-AD5560EBUZ
Description
Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet
1.AD5560JSVUZ-REEL.pdf
(60 pages)
Specifications of EVAL-AD5560EBUZ
Main Purpose
Power Management, Power Supply Supervisor/Tracker/Sequencer
Utilized Ic / Part
AD5560
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Embedded
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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If Bits[8:7] of the system control register (Address 0x1) are
high, then the CLEN and HW_INH operate as normal, and the
update waits until BUSY goes high (this way multiple channels
can still be synchronized by simply tying BUSY pins together).
REGISTER UPDATE RATES
As mentioned previously, the value of the x2 register is
calculated each time the user writes new data to the
Rev. C | Page 43 of 60
corresponding x1 register. The calculation is performed by a
three stage process. The first two stages take 600 ns each, and
the third stage takes 300 ns. When the write to one of the x1
registers is complete, the calculation process begins. The user
is free to write to another register provided that the write
operation does not finish until the first stage calculation is
complete, that is, 600 ns after the completion of the first write
operation.
AD5560
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