EVAL-AD5560EBUZ Analog Devices Inc, EVAL-AD5560EBUZ Datasheet - Page 38

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EVAL-AD5560EBUZ

Manufacturer Part Number
EVAL-AD5560EBUZ
Description
Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD5560EBUZ

Main Purpose
Power Management, Power Supply Supervisor/Tracker/Sequencer
Utilized Ic / Part
AD5560
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Embedded
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD5560
The transfer function for these 16-bit DACs is
The transfer function for the clamp current value is
where:
R
MI_AMP_GAIN is the gain of the MI amp (either 10 or 20).
OSD DAC
The OSD DAC is a 16-bit DAC function, again a resistor string
DAC guaranteeing monotonicity. The 16-bit binary digital
code loaded to the DAC register determines at what node on
the string the voltage is tapped off before being fed to the
output amplifier. The OSD function is used to program the
voltage difference needed between the force and sense lines
before the alarm circuit flags an error. The OSD DAC has a
range of 0.62 V to 5 V. The transfer function is as follows:
The offset DAC does not affect the OSD DAC output range.
DUTGND DAC
Similarly, the DUTGND DAC (DGS) is a 16-bit DAC and uses
a resistor string DAC to guarantee monotonicity. The 16-bit
binary digital code loaded to the DAC register determines at
what node on the string the voltage is tapped off before being
fed to the output amplifier. This function is used to program
the voltage difference needed between the DUTGND and
AGND lines before the alarm circuit flags an error.
The DUTGND DAC has a range of 0 V to 5 V. The transfer
function for this 16-bit DAC is shown in Equation 1.
The offset DAC does not affect the OSD DAC output range.
OFFSET DAC
In addition to the offset and gain trim, there is also a 16-bit
offset DAC that offsets the output of each DAC on chip. There-
fore, depending on headroom available, the input to the force
amplifier can be arranged either symmetrically or asymmetrically
about DUTGND but always within a voltage span of 25 V. Some
extra gain is included to allow for system error correction using
the m (gain) and c (offset) registers.
The usable voltage range is −22 V to +25 V. Full scale loaded
to the offset DAC does not give a useful output voltage range
because the output amplifiers are limited by available footroom.
Table 15 shows the effect of the offset DAC on other DACs in
the device (clamp, comparator, and force DACs).
SENSE
V
VCLH
ICLL
is the sense resistor.
OUT
OFFSET
,
=
ICLH
,
VCLL
VREF
_
=
DAC
2
=
16
. 5
×
. 5
125
125
_
DAC
R
CODE
×
SENSE
×
V
V
REF
2
REF
CODE
16
×
×
MI
×
+
⎜ ⎜
⎜ ⎜
DAC
DUTGND
DAC
_
AMP
CODE
2
CODE
16
2
_
16
GAIN
⎟ ⎟
32768
. 5
125
⎟ ⎟
×
V
REF
×
Rev. C | Page 38 of 60
(1)
Table 15. Offset DAC Relationship with Other DACs, V
Offset DAC Code
0
0
0
32,768
32,768
32,768
57,344
57,344
57,344
65,355
1
OFFSET AND GAIN REGISTERS
Each DAC level contains independent offset and gain control
registers that allow the user to digitally trim offset and gain.
These registers give the user the ability to calibrate out errors
in the complete signal chain (including the DAC) using the
internal m and c registers, which hold the correction factors.
The digital input transfer function for the DACs can be
represented as
where:
x2 is the data-word loaded to the resistor string DAC.
x1 is the 16-bit data-word written to the DAC input register.
m is the code in the gain register (default code = 2
n is the DAC resolution (n = 16).
c is the code in the offset register (default code = 2
Offset and Gain Registers for the Force Amplifier DAC
The force amplifier input (F
offset and gain control registers that allow the user to digitally
trim offset and gain. There is one set of registers for the force
voltage range: x1, m, and c.
Offset and Gain Registers for the Comparator DACs
The comparator DAC levels contain independent offset and
gain control registers that allow the user to digitally trim offset
and gain. There are seven sets of registers consisting of a combi-
nation of x1, m, and c, one set each for the five internal force
current ranges and one set each for the two external high
current ranges.
Offset and Gain Registers for the Clamp DACs
The clamp DAC levels contain independent offset and gain
control registers that allow the user to digitally trim offset
and gain. One set of registers covers the V
internal force current ranges, and the two external high current
ranges. Both clamp DAC x1 registers and their associated offset
and gain registers are 16 bit.
DAC code shown for 16-bit force DAC.
x2 = [x1 × (m + 1)/2
DAC Code
0
32,768
65,535
0
32,768
65,535
0
32,768
65,535
n
] + (c – 2
IN
) DAC level contains independent
1
n – 1
DAC Output Voltage Range
0.00
12.81
25.62
−12.81
0.00
12.81
−22.42
−9.61
3.20
Footroom limitations
)
SENSE
range, the five
16
15
).
– 1).
REF
= 5 V

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