EVAL-AD1939AZ Analog Devices Inc, EVAL-AD1939AZ Datasheet - Page 25

• Manufacturer Part Number: EVAL-AD1939AZ
• Description: Eval BD FOR MULTI CHANNEL 96KHz Codec
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD1939AZ

• Main Purpose: Audio, CODEC
• Utilized Ic / Part: AD1939
• Primary Attributes: 24-Bit, 192 kHz, 4 ADCs: 107dB Dynamic Range, 8 DACs: 112dB Dynamic Range
• Secondary Attributes: Time Division Multiplexed (TDM), SPI Interface
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Embedded: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Evaluation Board User Guide
// CS8404 Tx interface mode select
// divide 256Fs clock by 2 for 128Fs clock to the S/PDIF Tx
//
//
//
// For SPI mode, let external port drive the SPI port
TDM-daisy chain mode
TDM-OUT IN DUAL LINE DAC TDM MODE
//
//
//
//
BCLK_8406 = I_ABCLK;
LRCLK_8406 = I_ALRCLK;
SDATA_8406 = (ASDATA1 & S/PDIF_OUT_MUX) # (ASDATA2 & !S/PDIF_OUT_MUX);
DBCLK.oe
DLRCLK.oe = (DAC_S/PDIF
ABCLK.oe
ALRCLK.oe = (ADC_S/PDIF
HDR1_DBCLK.oe
HDR1_DLRCLK.oe = (DAC_S/PDIF
HDR1_ABCLK.oe
HDR1_ALRCLK.oe = (ADC_S/PDIF
BCLK_8416.oe
LRCLK_8416.oe = (!DAC_S/PDIF);
BCLK_8416
LRCLK_8416
DSDATA1.oe
DSDATA2.oe
DSDATA3.oe
DSDATA4.oe
ASDATA2.oe
HDR1_DSDATA2.oe = (DAC_HDR1_TDM # DAC_DUAL_TDM);
M3_8414 = 0;
Qdivide.d = !Qdivide;
M0_8404 = 0;
M1_8404 = 0;
M2_8404 = 1;
Qdivide.clk =
MCLK_8406 = Qdivide;
= (DAC_S/PDIF
= (ADC_S/PDIF
= (!DAC_DATA_HIZ);
= (!(DAC_HDR1_TDM # DAC_DUAL_TDM # DAC_DATA_HIZ));
= (!DAC_DATA_HIZ);
= (!(DAC_DUAL_TDM # ADC_HDR_AUX # DAC_HDR1_AUX # DAC_DATA_HIZ));
= (ADC_HDR_TDM);
= (!DAC_S/PDIF);
= I_DBCLK;
= I_DLRCLK;
= (DAC_S/PDIF
= (ADC_S/PDIF
// I2S format only
CPLD_MCLK;
APMS_TX = 0; // Tx serial port is always slave in this application
SFMT1_TX = 0;
SFMT0_TX = 1;
MCLK_8406 = CPLD_MCLK;
# DAC_HDR1 # DAC_ADC # !DAC_DAC) & (DAC_CLK_OFF);
# DAC_HDR1 # DAC_ADC # !DAC_DAC) & (DAC_CLK_OFF);
# ADC_HDR1 # !ADC_ADC # ADC_DAC) & (ADC_CLK_OFF);
# ADC_HDR1 # !ADC_ADC # ADC_DAC) & (ADC_CLK_OFF);
# !DAC_HDR1 # DAC_ADC # DAC_DAC);
# !DAC_HDR1 # DAC_ADC # DAC_DAC);
# !ADC_HDR1 # ADC_ADC # ADC_DAC);
# !ADC_HDR1 # ADC_ADC # ADC_DAC);
//ASDATA2 is input in ADC TDM mode
// Tx data format is I2S always
Rev. 0 | Page 25 of 32
//DSDATA2 is output in DAC
// SECOND
UG-040