EPF10K50VBC356-1 Altera, EPF10K50VBC356-1 Datasheet - Page 22

FLEX 10KA

EPF10K50VBC356-1

Manufacturer Part Number
EPF10K50VBC356-1
Description
FLEX 10KA
Manufacturer
Altera
Datasheet

Specifications of EPF10K50VBC356-1

Family Name
FLEX 10K
Number Of Usable Gates
50000
Number Of Logic Blocks/elements
2880
# Registers
930
# I/os (max)
274
Frequency (max)
250MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
3.3V
Logic Cells
2880
Ram Bits
20480
Device System Gates
116000
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
356
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant

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22
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
During compilation, the Compiler automatically selects the best control
signal implementation. Because the clear and preset functions are active-
low, the Compiler automatically assigns a logic high to an unused clear or
preset.
The clear and preset logic is implemented in one of the following six
modes chosen during design entry:
In addition to the six clear and preset modes, FLEX 10K devices provide a
chip-wide reset pin that can reset all registers in the device. Use of this
feature is set during design entry. In any of the clear and preset modes, the
chip-wide reset overrides all other signals. Registers with asynchronous
presets may be preset when the chip-wide reset is asserted. Inversion can
be used to implement the asynchronous preset.
of how to enter a section of a design for the desired functionality.
Asynchronous clear
Asynchronous preset
Asynchronous clear and preset
Asynchronous load with clear
Asynchronous load with preset
Asynchronous load without clear or preset
Figure 10
Altera Corporation
shows examples

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