DSPIC33EP512MU810-I/PT Microchip Technology, DSPIC33EP512MU810-I/PT Datasheet - Page 74

• Manufacturer Part Number: DSPIC33EP512MU810-I/PT
• Description: 100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP512MU810-I/PT

• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 83
• Flash Memory Size: 536KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 512KB (170K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 24K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-20:
File Name Addr.
I2C1RCV
I2C1TRN
I2C1BRG
I2C1CON
I2C1STAT 0208 ACKSTAT TRSTAT
I2C1ADD
I2C1MSK
I2C2RCV
I2C2TRN
I2C2BRG
I2C2CON
I2C2STAT 0218 ACKSTAT TRSTAT
I2C2ADD
I2C2MSK
Legend:
020A
020C
021A
021C
0200
0202
0204
0206
0210
0212
0214
0216
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
I2CEN
I2CEN
Bit 15
I2C1 and I2C2 REGISTER MAP
—
—
—
—
—
—
—
—
—
—
Bit 14
—
—
—
—
—
—
—
—
—
—
—
—
I2CSIDL
I2CSIDL
Bit 13
—
—
—
—
—
—
—
—
—
—
—
—
SCLREL
SCLREL
Bit 12
—
—
—
—
—
—
—
—
—
—
—
—
IPMIEN
IPMIEN
Bit 11
—
—
—
—
—
—
—
—
—
—
—
—
Bit 10
A10M
A10M
BCL
BCL
—
—
—
—
—
—
—
—
—
—
DISSLW
GCSTAT
DISSLW
GCSTAT
Bit 9
—
—
—
—
—
—
ADD10
ADD10
SMEN
SMEN
Bit 8
—
—
—
—
IWCOL
IWCOL
GCEN
GCEN
Bit 7
STREN
STREN
I2COV
I2COV
Bit 6
ACKDT
ACKDT
Bit 5
D_A
D_A
Address Register
Address Register
Address Mask
Address Mask
Baud Rate Generator
Baud Rate Generator
ACKEN
ACKEN
Bit 4
Transmit Register
Transmit Register
Receive Register
Receive Register
P
P
RCEN
RCEN
Bit 3
S
S
Bit 2
R_W
R_W
PEN
PEN
RSEN
RSEN
Bit 1
RBF
RBF
Bit 0
SEN
TBF
SEN
TBF
Resets
0000
00FF
0000
1000
0000
0000
0000
0000
00FF
0000
1000
0000
0000
0000
All