DSPIC33EP512MU810-I/PT Microchip Technology, DSPIC33EP512MU810-I/PT Datasheet - Page 369

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DSPIC33EP512MU810-I/PT

Manufacturer Part Number
DSPIC33EP512MU810-I/PT
Description
100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr

Specifications of DSPIC33EP512MU810-I/PT

Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
83
Flash Memory Size
536KB
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
TQFP
No. Of Pins
100
Rohs Compliant
Yes
Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
512KB (170K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
24K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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REGISTER 22-15: UxIR: USB INTERRUPT STATUS REGISTER (HOST MODE ONLY)
 2009-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/K-0, HS
STALLIF
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
U-0
Unimplemented: Read as ‘0’
STALLIF: STALL Handshake Interrupt bit
1 = A STALL handshake was sent by the peripheral device during the handshake phase of the
0 = A STALL handshake has not been sent
ATTACHIF: Peripheral Attach Interrupt bit
1 = A peripheral attachment has been detected by the module; set if the bus state is not SE0 and there
0 = No peripheral attachement detected
RESUMEIF: Resume Interrupt bit
1 = A K-State is observed on the D+ or D- pin for 2.5 s (differential ‘1’ for low-speed, differential ‘0’ for
0 = No K-State observed
IDLEIF: Idle Detect Interrupt bit
1 = Idle condition detected (constant Idle state of 3 ms or more)
0 = No Idle condition detected
TRNIF: Token Processing Complete Interrupt bit
1 = Processing of current token is complete; read USTAT register for endpoint BDT information
0 = Processing of current token is not complete; clear USTAT register or load next token from STAT
SOFIF: Start of Frame Token Interrupt bit
1 = Start of Frame threshold reached by the host
0 = No Start of Frame token threshold reached
UERRIF: USB Error Condition Interrupt bit
1 = An unmasked error condition has occurred; only error states enabled in the UxEIE register can set
0 = No unmasked error condition has occurred
DETACHIF: Detach Interrupt bit
1 = A peripheral detachment has been detected by the module
0 = No peripheral detachment detected
ATTACHIF
R/K-0, HS
transaction in Device mode
has been no bus activity for 2.5 s
full-speed)
this bit
U-0
U = Unimplemented bit, read as ‘0’
K = Write ‘1’ to clear bit
‘1’ = Bit is set
RESUMEIF
R/K-0, HS
U-0
R/K-0, HS
IDLEIF
U-0
Preliminary
HS = Hardware Settable bit
‘0’ = Bit is cleared
R/K-0, HS
TRNIF
U-0
R/K-0, HS
SOFIF
U-0
x = Bit is unknown
UERRIF
U-0
R-0
DS70616E-page 369
DETACHIF
R/K-0, HS
U-0
bit 8
bit 0

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