DAC1205D650HW/C1:5 NXP Semiconductors, DAC1205D650HW/C1:5 Datasheet - Page 9

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DAC1205D650HW/C1:5

Manufacturer Part Number
DAC1205D650HW/C1:5
Description
DAC1205D650HW/HTQFP100/TRAYBDP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of DAC1205D650HW/C1:5

Settling Time
20ns
Number Of Bits
12
Data Interface
SPI™
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
1.4W
Operating Temperature
-45°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935286777551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DAC1205D650HW/C1:5
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
NXP Semiconductors
9. Characteristics
Table 5.
V
+85
specified.
DAC1205D650
Product data sheet
Symbol
V
V
V
V
I
I
I
I
I
P
DD(IO)(3V3)
DDA(3V3)
DDD(1V8)
DDA(1V8)
DDD
DDA(1V8)
DD(IO)(3V3)
DDA(3V3)
DDA(1V8)
DDD(1V8)
tot
°
C; typical values measured at T
= V
Characteristics
DDD(1V8)
Parameter
input/output supply
voltage (3.3 V)
analog supply voltage
(3.3 V)
analog supply voltage
(1.8 V)
digital supply voltage
(1.8 V)
input/output supply
current (3.3 V)
analog supply current
(3.3 V)
digital supply current
(1.8 V)
analog supply current
(1.8 V)
digital supply current
total power
dissipation
= 1.8 V; V
DDA(3V3)
amb
Conditions
f
8× interpolation; NCO on
f
8× interpolation; NCO on
f
8× interpolation; NCO on
f
8× interpolation; NCO on
f
4× interpolation; NCO off; DAC B
off
f
4× interpolation; NCO off
f
4× interpolation; NCO on
f
8× interpolation; NCO off
f
8× interpolation; NCO on; All V
f
8× interpolation; NCO low-power
on
Power-down mode
for x / (sin x) function only
o
o
o
o
o
o
o
o
o
o
= V
= 25
= 19 MHz; f
= 19 MHz; f
= 19 MHz; f
= 19 MHz; f
= 19 MHz; f
= 19 MHz; f
= 19 MHz; f
= 19 MHz; f
= 19 MHz; f
= 19 MHz; f
full power-down; all V
DAC A and DAC B Sleep mode;
8× interpolation; NCO on
All information provided in this document is subject to legal disclaimers.
DD(IO)(3V3)
°
C; R
Rev. 2 — 13 September 2010
L
s
s
s
s
s
s
s
s
s
s
= 50
Dual 12-bit DAC, up to 650 Msps; 2× 4× and 8× interpolating
= 3.3 V; AGND, DGND and GNDIO shorted together; T
= 640 Msps;
= 640 Msps;
= 640 Msps;
= 640 Msps;
= 320 Msps;
= 320 Msps;
= 320 Msps;
= 640 Msps;
= 640 Msps;
= 640 Msps;
Ω
; I
O(fs)
DD
= 20 mA; maximum sample rate; PLL on unless otherwise
DD
Test
[1]
I
I
I
I
I
I
I
I
I
C
C
C
C
I
C
I
I
Min
3.0
3.0
1.7
1.7
-
-
-
-
-
-
-
-
-
-
-
-
-
DAC1205D650
Typ
3.3
3.3
1.8
1.8
5
48
270
330
67
0.53
0.82
0.94
0.95
1.18
1.07
0.08
0.88
Max
3.6
3.6
1.9
1.9
13
26
309
358
-
-
-
-
-
1.4
-
0.13
-
© NXP B.V. 2010. All rights reserved.
amb
=
Unit
V
V
V
V
mA
mA
mA
mA
mA
W
W
W
W
W
W
W
W
40
9 of 43
°
C to

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