CY8C3665AXI-010 Cypress Semiconductor Corp, CY8C3665AXI-010 Datasheet - Page 55

• Manufacturer Part Number: CY8C3665AXI-010
• Description: PSOC3
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C36xxr

Specifications of CY8C3665AXI-010

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 67MHz
• Number Of I /o: 62
• Eeprom Size: 1K x 8
• Core Processor: 8051
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 32KB (32K x 8)
• Data Converters: A/D 2x12b, D/A 4x8b
• Oscillator Type: Internal
• Peripherals: CapSense, DMA, POR, PWM, WDT
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: TQFP
• Screening Level: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Rad Hardened: No
• Processor Series: CY8C36
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 67 MHz
• Number Of Programmable I/os: 28 to 72
• Number Of Timers: 4
• Operating Supply Voltage: 0.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 62
• Eeprom Memory Size: 1KB
• Ram Memory Size: 4KB
• Cpu Speed: 67MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.3.2 LUT
The CY8C36 family of devices contains four LUTs. The LUT is a
two input, one output lookup table that is driven by any one or
two of the comparators in the chip. The output of any LUT is
routed to the digital system interface of the UDB array. From the
digital system interface of the UDB array, these signals can be
connected to UDBs, DMA controller, I/O, or the interrupt
controller.
The LUT control word written to a register sets the logic function
on the output. The available LUT functions and the associated
control word is shown in
Table 8-2. LUT Function vs. Program Word and Inputs
8.4 Opamps
The CY8C36 family of devices contain up to four general
purpose opamps in a device.
Figure 8-7. Opamp
The opamp is uncommitted and can be configured as a gain
stage or voltage follower, or output buffer on external or internal
signals.
See
can all be connected to the internal global signals and monitored
with an ADC, or comparator. The configurations are
implemented with switches between the signals and GPIO pins.
Document Number: 001-53413 Rev. *L
Internal Bus
Global Bus
Global Bus
Analog
Analog
Analog
Figure
VREF
GPIO
GPIO
Control Word
0000b
0001b
0010b
0011b
0100b
0101b
0110b
1000b
1001b
1010b
1011b
1100b
1101b
0111b
1110b
1111b
8-8. In any configuration, the input and output signals
Table 8-2
Output (A and B are LUT inputs)
Opamp
.
A AND (NOT B)
(NOT A) AND B
A OR (NOT B)
(NOT A) OR B
=
FALSE (‘0’)
A XNOR B
A NAND B
TRUE (‘1’)
A NOR B
A AND B
A XOR B
A OR B
Analog Switch
NOT B
NOT A
A
B
GPIO
Figure 8-8. Opamp Configurations
The opamp has three speed modes, slow, medium, and fast. The
slow mode consumes the least amount of quiescent power and
the fast mode consumes the most power. The inputs are able to
swing rail-to-rail. The output swing is capable of rail-to-rail
operation at low current output, within 50 mV of the rails. When
driving high current loads (about 25 mA) the output voltage may
only get within 500 mV of the rails.
8.5 Programmable SC/CT Blocks
The CY8C36 family of devices contains up to four switched
capacitor/continuous time (SC/CT) blocks in a device. Each
switched capacitor/continuous time block is built around a single
rail-to-rail high bandwidth opamp.
Switched capacitor is a circuit design technique that uses
capacitors plus switches instead of resistors to create analog
functions. These circuits work by moving charge between
capacitors by opening and closing different switches.
Nonoverlapping in phase clock signals control the switches, so
that not all switches are ON simultaneously.
The PSoC Creator tool offers a user friendly interface, which
allows you to easily program the SC/CT blocks. Switch control
and clock phase control configuration is done by PSoC Creator
so users only need to determine the application use parameters
such as gain, amplifier polarity, V
To Internal Signals
Vin
Vp
Vn
c) Internal Uncommitted
b) External Uncommitted
a) Voltage Follower
Opamp
Opamp
Opamp
Opamp
Opamp
PSoC
®
REF
3: CY8C36 Family
connection, and so on.
GPIO Pin
Vout to GPIO
Vp to GPIO
Vn to GPIO
Vout to Pin
Vout to Pin
Data Sheet
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