CS4244-CNZ Cirrus Logic Inc, CS4244-CNZ Datasheet - Page 57

• Manufacturer Part Number: CS4244-CNZ
• Description: IC 4 Input / 5 Output CODEC
• Manufacturer: Cirrus Logic Inc

DS900PP2
6.16
6.16.1 Test Mode Error Interrupt Mask
6.16.2 Serial Port Error Interrupt Mask
6.16.3 Clocking Error Interrupt Mask
6.16.4 ADCx Overflow Interrupt Mask
TST MODE ERR
MASK
Interrupt Mask 1 (Address 1Fh)
7
• Serial Port Format:
• Speed Mode:
• Master/Slave:
Allows or prevents a Test Mode Error event from flagging the interrupt pin. A test mode error occurs when
an inadvertent I²C write places the device in test mode.
Allows or prevents a Serial Port Error event from flagging the interrupt pin. A serial port error occurs when
any of the following control port parameters are changed without first placing the device into power down
(power down is defined as all
Allows or prevents a Clocking Error event from flagging the interrupt pin. See
Allows or prevents an ADCx Overflow event from flagging the interrupt pin.
MASK
TSTMOD ERR
0
1
MASK
SP ERR
0
1
MASK
CLK ERR
0
1
MASK
ADCx OVFL
0
1
vice being powered down, it will flag this error as well as the Clocking Error. When in master mode, if
the MCLK frequency changes without the device being powered down, it will not flag this error or the
Clocking Error since the MCLK/F
SP ERR
MASK
6
SPEED MODE[1:0]
MSTR / SLV
In the event of a Test Mode Error event, Interrupt Pin will:
Be Flagged
Not be flagged
In the event of a Serial Port Error event, Interrupt Pin will:
Be Flagged
Not be flagged
In the event of a Clocking Error event, Interrupt Pin will:
Be Flagged
Not be flagged
In the event of an ADCx Overflow event, Interrupt Pin will:
Be Flagged
Not be flagged
CLK ERR
SP FORMAT[1:0]
MASK
5
Power Down ADCx
Reserved
S
(When in slave mode, if the MCLK/F
ratio will not be changed.)
4
ADC4 OVFL
MASK
and
3
Power Down DACx
ADC3 OVFL
MASK
2
S
bits are set to 1):
ratio changes without the de-
ADC2 OVFL
Section 4.8
MASK
1
for details.
ADC1 OVFL
CS4244
MASK
0
57