CS4244-CNZ Cirrus Logic Inc, CS4244-CNZ Datasheet - Page 19

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CS4244-CNZ

Manufacturer Part Number
CS4244-CNZ
Description
IC 4 Input / 5 Output CODEC
Manufacturer
Cirrus Logic Inc
Datasheet

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Price
Part Number:
CS4244-CNZ
Manufacturer:
CIRRUS
Quantity:
20 000
DS900PP2
SWITCHING CHARACTERISTICS - SERIAL AUDIO INTERFACE
VA_SEL
Notes:
RST
MCLK Frequency
MCLK Duty Cycle
SCLK Duty Cycle
Input Sample Rate (FS/LRCK pin)
SCLK Falling Edge to SDOUTx Valid (VL = 1.8 V)
SCLK Falling Edge to SDOUTx Valid (VL = 2.5 V)
SCLK Falling Edge to SDOUTx Valid (VL = 3.3 V or 5 V)
TDM Slave Mode
SCLK Frequency
FS/LRCK High Time Pulse
FS/LRCK Rising Edge to SCLK Rising Edge
SDINx Setup Time Before SCLK Rising Edge
SDINx Hold Time After SCLK Rising Edge
PCM Slave Mode
SCLK Frequency
FS/LRCK Duty Cycle
FS/LRCK Edge to SCLK Rising Edge
SDINx Setup Time Before SCLK Rising Edge
SDINx Hold Time After SCLK Rising Edge
PCM Master Mode
SCLK Frequency
FS/LRCK Duty Cycle
FS/LRCK Edge to SCLK Rising Edge
SDINx Setup Time Before SCLK Rising Edge
SDINx Hold Time After SCLK Rising Edge
(VL = 1.8 V)
SDINx Hold Time After SCLK Rising Edge
(VL = 2.5 V, 3.3 V, or 5 V)
pin Low Pulse Width
26. After applying power to the
27. MCLK must be synchronous to and scale with F
28. The SCLK frequency must remain less than or equal to the MCLK frequency. For this reason, SCLK
29. The MSB of CH1 is always aligned with the second SCLK rising edge following FS/LRCK rising edge.
30. Where “n” is equal to the MCLK to LRCK ratio (set by the
= 0 for VA = 3.3 VDC, 1 for VA = 5.0 VDC.
are stable.
may range from 256x to 512x only in single speed mode. In double speed mode, 256x is the only ratio
supported.
mode, n = 256, in 512x mode, n = 512, etc.
Parameters
CS4244
Double-Speed Mode
Single-Speed Mode
,
RST
should be held low until after the power supplies and MCLK
(Note 26)
(Note 27)
(Note 28)
(Note 29)
S
.
Symbol
t
t
t
t
t
t
t
t
t
t
t
F
F
dh2
dh2
dh2
lcks
t
dh1
lcks
t
dh1
lcks
t
dh1
dh1
lpw
ds
ds
ds
S
S
Master Clock Rate
1/f
256x
7.68
Min
32x
64x
45
45
30
60
10
45
45
11
SCLK
1
5
3
5
5
3
5
5
5
-
-
-
register bits), i.e. in 256x
(n-1)/f
(Note 30)
512x
Max
25.6
100
64x
64x
55
55
50
31
22
17
55
55
-
-
-
-
-
-
-
-
-
-
-
SCLK
CS4244
Units
MHz
kHz
kHz
ms
ns
ns
ns
F
ns
ns
ns
ns
F
ns
ns
ns
F
ns
ns
ns
ns
%
%
%
%
S
S
S
19

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