CS4207-DNZ Cirrus Logic Inc, CS4207-DNZ Datasheet - Page 23

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CS4207-DNZ

Manufacturer Part Number
CS4207-DNZ
Description
IC Low Pwr,4/6 HD Aud Codec W/HP Amp
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Datasheet

Specifications of CS4207-DNZ

Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 3
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
105 / 110
Voltage - Supply, Analog
2.97 V ~ 5.25 V
Voltage - Supply, Digital
2.97 V ~ 5.25 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-QFN
Package
48WQFN
Number Of Channels Per Chip
16
Adc/dac Resolution
24 Bit
Gain Control
Programmable
Number Of Dacs
3
Number Of Dac Outputs
2
Operating Supply Voltage
1.8|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
598-1798

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DS880F1
POWER CONSUMPTION
(This table represents the power consumption for individual circuit blocks within the CODEC) (See
(The following table demonstrates the total power consumption for typical system operation. These total CODEC
power numbers are derive from the individual block power consumption numbers in the previous table.)
1
2
3
4
5
6
1
2
3
4
5
Individual Block Operation
Codec D3 State- unsolicited
response
ADC1 or ADC2 with PGA oper-
ation and Pseudo-Diff Inputs
DAC1 with Headphone/Line
Out(Note 20)
DAC2 or DAC3 with Differen-
tial Line
S/PDIF transmitter with SRC
function
S/PDIF receiver with SRC
function
Stereo Record from Line In
1 (PGA/ADC1)
Stereo Playback to Head-
phone (No Load)
Stereo Playback to Head-
phone Out and S/PDIF Out
Receive from S/PDIF and
Playback to S/PDIF Out
Stereo Record & Playback
Line In 1 / Line Out 1
17. Unless otherwise noted, test conditions are as follows: All zeros input, sample rate = 48 kHz; No load.
18. RESET held HI, all HDA Bus clocks and data lines are running; HDA Interface running with support for
19. Represents total power for the HDA Bus interface logic playing 6 channels and capturing 4 channels of
20. Full-scale single-ended output signal into a 10 kΩ load.
21. Full-scale differential output signal into a 10 kΩ load.
Typical CODEC
Operation
Out(Note 21)
unsolicited responses; All converters are in D3 state.
48 kHz audio.
capable(Note 18)
D0 D3 D3 D3 D3 D3 D3
D3 D3 D0 D3 D3 D3 D3
D3 D3 D0 D3 D3 D0 D3
D3 D3 D3 D3 D3 D0 D0
D0 D3 D3 D0 D3 D3 D3
VA_HP
VA/
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
Power States
11.08
14.06
10.72
13.59
0.94
1.20
5.47
6.23
0.84
1.10
0.84
1.10
i
VA
i
VA_HP
0.00
0.00
0.00
0.00
1.51
1.76
0.00
0.00
0.00
0.00
0.00
0.00
Typical Current (mA)
VA_HP
VA/
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
12.67
=1.8V
3.34
7.27
8.79
8.72
8.90
i
VD
VD
response + DAC1+ S/PDIF OUT
HDA Interface + unsolicited
HDA Interface + unsolicited
HDA Interface + unsolicited
HDA Interface + unsolicited
response + S/PDIF IN/OUT
HDA Interface + unsolicited
response + ADC1 + DAC2
VL_HD
i
=3.3V
VL_HD
0.07
0.17
0.06
0.06
0.07
0.10
response + ADC1
response + DAC1
Active Blocks
VL_IF
=3.3V
i
0.00
0.00
0.00
0.00
0.23
0.00
VL_IF
for individual
Total Power
block
(Note
12.24
31.70
44.80
57.57
95.12
51.27
83.84
19.78
22.51
25.91
28.64
9.35
(mW)
Power
CS4207
17))
CODEC
107.36
129.87
140.88
Total
41.04
57.04
66.91
86.69
55.04
63.39
92.31
(mW)
23

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